Semiconductor Package Joint Structure for Cold-Joint Resistance
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Solution Overview
Problem
The semiconductor industry faces challenges in packaging technologies due to stress from differing thermal expansion coefficients of materials, leading to delamination and cold joints in semiconductor devices.
Innovation Solution
A joint structure is formed by reducing the critical dimension of conductive bumps while maintaining the volume of solder-containing layers, which reduces interconnection defects such as cold-joints and bridging.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the critical dimension of conductive bumps is reduced to increase integration density, then more components can be integrated into a given area, but the risk of delamination and cold joint increases due to stress from differing thermal expansion coefficients
Solution Approach 1:
The patent changes the physical parameters of the joint structure by forming a cup-shaped solder joint with increased height and adjusted volume distribution. This parameter change allows the joint to accommodate thermal expansion stress while maintaining electrical connectivity, thus resolving the contradiction between reduced bump size for higher integration density and joint reliability under thermal stress
Solution Approach 2:
The patent employs a composite joint structure combining conductive bump material with solder-containing layer material. This composite approach creates a joint that leverages the properties of both materials to resist delamination and cold joint formation, enabling smaller bump dimensions without compromising reliability
2Area of stationary object
If smaller packages are used to occupy less area, then integration density improves, but stress from thermal expansion differences causes delamination and cold joint risks
Solution Approach 1:
The patent modifies the geometric parameters of the solder joint by creating a cup-shaped structure with increased height compensating for reduced lateral dimensions. This parameter adjustment allows smaller package footprints while maintaining sufficient joint volume to handle thermal stress, preventing delamination and cold joints in compact packages
Solution Approach 2:
The patent transitions from a traditional lateral expansion approach to a vertical dimension solution by forming cup-shaped joints with increased height. This dimensional shift allows the joint to accommodate thermal stress in the vertical direction while maintaining a compact lateral footprint, enabling smaller packages without sacrificing reliability
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach minimizes interconnection defects and enhances the reliability of semiconductor packages by addressing warpage and misalignment issues caused by thermal expansion differences.
Implementation Method 1
a reflow process is performed to melt the fourth conductive layer of the first conductive bump and the fourth conductive layer of the second conductive bump
Implementation Method 2
the different layers making up the interconnection in the packages have different coefficients of thermal expansion (CTEs). As a result, a relatively large stress derived from this difference is exhibited on the joint area
Data Source
AI summary
A method of forming a package includes: forming a first package component including first and second conductive bumps; forming a second package component including third and fourth conductive bumps; and bonding the first package component to the second package component through first and second joint structures. The first and second conductive bumps are smaller than the third and fourth conductive bumps. The first joint structure partially covers the first and third conductive bumps. The second joint structure partially covers the second and fourth conductive bumps. An angle between a sidewall of the first conductive bump and a tangent line at a boundary of the first joint structure on the sidewall of the first conductive bump is greater than an angle between a sidewall of the second conductive bump and a tangent line at a boundary of the second joint structure on the sidewall of the second conductive bump.