Semiconductor Package Layout With Regional Metal Density Control

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Solution Overview

Problem

Integration of multiple semiconductor devices in wafer-level packaging poses challenges due to complexities in interconnection and bonding processes, which affect the efficiency and yield of semiconductor devices in electronic apparatus.

Innovation Solution

The implementation of a hybrid bonding process with a wafer substrate and die, utilizing a dual damascene process for forming bonding vias and pads, and the use of a redistribution structure to alleviate RLC performance degradation by optimizing metal density and pattern density in different regions, allowing for efficient integration and testing of 3D packaging or 3DIC devices.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If multiple semiconductor devices are integrated in wafer-level packaging, then device integration is improved, but interconnection and bonding process complexity increases

Engineering Contradiction:
Improvedevice integrationVSAvoidinterconnection and bonding process
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The wafer substrate is divided into different regions (first region with higher metal density and second region with lower metal density) to segment the bonding process into distinct zones with different functional requirements, allowing complex interconnections to be organized into manageable segments

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different metal density characteristics are assigned to different regions of the wafer substrate - the first region has higher metal density for robust bonding, while the second region has lower metal density for reduced RLC degradation, enabling each region to be optimized for its specific function

Inventive Principle:
Principle #3Local quality

2Ease of manufacture

If uniform metal density is used across the wafer substrate, then manufacturing simplicity is maintained, but RLC performance degradation occurs

Engineering Contradiction:
Improvemanufacturing simplicityVSAvoidRLC performance
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The wafer substrate employs non-uniform metal density distribution with a first region having higher metal density for bonding reliability and a second region having lower metal density to minimize RLC performance degradation, with each region optimized for its specific functional requirement

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The metal density parameter is varied across different regions of the wafer substrate - increased metal density in the first region for bonding strength and decreased metal density in the second region for reduced parasitic effects, optimizing both reliability and performance

Inventive Principle:
Principle #35Parameter changes

3Strength

If high metal density is used throughout the wafer substrate, then bonding strength is improved, but RLC performance degradation increases

Engineering Contradiction:
Improvebonding strengthVSAvoidRLC performance
Core Design Contradiction:
StrengthVSReliability

Solution Approach 1:

High metal density is localized to the first region where bonding strength is critical, while the second region maintains lower metal density to minimize RLC performance degradation, ensuring each area has the appropriate metal density for its function

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The wafer substrate is segmented into a first region optimized for bonding (higher metal density) and a second region optimized for electrical performance (lower metal density), allowing bonding strength and RLC performance to be independently optimized in their respective zones

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS11769724B2Package having different metal densities in different regions and manufacturing method thereof
Publication Date: 2023.09.26 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US11769724B2 patent drawing
  • US11769724B2 patent drawing
  • US11769724B2 patent drawing

AI summary

A package has a first region and a second region surrounded by the first region. The package includes a first die, a second die, an encapsulant, and an inductor. The first die extends from the first region to the second region. The second die is bonded to the first die and is located within a span of the first die. The encapsulant is aside the second die. At least a portion of the encapsulant is located in the second region. The inductor is located in the second region. The inductor laterally has an offset from the second die. A metal density in the first region is greater than a metal density in the second region.