Package Interconnect Layout With Oblique Traces for Lower Die Latency

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Solution Overview

Problem

Integrated circuit (IC) packaging in system-in-package (SiP) devices faces challenges in reducing signal latency due to the complexity of routing decisions made by intermediary dies, which increases processing time and limits operating speeds.

Innovation Solution

The use of oblique electrical traces in the package substrate and interconnect bridges, such as embedded multi-die interconnect bridges (EMIB), connects diagonally positioned IC dies directly, reducing the need for multiple hops and intermediary routing decisions, thereby decreasing signal transmission latency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of time

If traditional multi-chip package routing through intermediary dies is used, then connectivity between diagonally positioned dies is achieved, but signal latency increases due to multiple hops and routing decisions

Engineering Contradiction:
Improvesignal latencyVSAvoidrouting complexity
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The patent introduces oblique traces that operate in a diagonal dimension across the package substrate, allowing direct connectivity between diagonally positioned dies without requiring signals to traverse through intermediary dies via traditional orthogonal routing paths. This dimensional change in trace orientation eliminates multiple routing hops and reduces signal latency by up to 50%.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Speed

If oblique traces are introduced to connect diagonally positioned dies directly, then signal latency is reduced, but manufacturing complexity increases

Engineering Contradiction:
Improvesignal transmission speedVSAvoidtrace fabrication complexity
Core Design Contradiction:
SpeedVSEase of manufacture

Solution Approach 1:

The patent changes the geometric parameter of trace orientation from traditional orthogonal (horizontal/vertical) to oblique angles, specifically introducing traces at approximately 45 degrees to the orthogonal axes. This parameter change enables direct diagonal connectivity while maintaining compatibility with standard PCB fabrication processes, thus improving signal transmission speed without prohibitively increasing manufacturing complexity.

Inventive Principle:
Principle #35Parameter changes

3Adaptability or versatility

If multiple intermediary dies are used for routing, then routing flexibility is maintained, but the number of traverses and processing time increase

Engineering Contradiction:
Improverouting flexibilityVSAvoidoperating speed
Core Design Contradiction:
Adaptability or versatilityVSProductivity

Solution Approach 1:

The patent extracts the routing function from intermediary dies by implementing direct oblique trace connections between diagonally positioned dies. This extraction eliminates the need for signals to enter, be processed by, and exit intermediary dies, thereby removing unnecessary traverses and routing decisions while maintaining routing flexibility through direct point-to-point connectivity.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS11929339B2Innovative interconnect design for package architecture to improve latency
Publication Date: 2024.03.12 ALTERA CORP
  • US11929339B2 patent drawing
  • US11929339B2 patent drawing
  • US11929339B2 patent drawing

AI summary

An integrated circuit includes a package substrate that includes first and second electrical traces. The integrated circuit includes first, second, third, and fourth configurable dies, which are mounted on the package substrate. The first and second configurable dies are arranged in a first row. The third and fourth configurable dies are arranged in a second row, which is approximately parallel to the first row. The first and third configurable dies are arranged in a first column. The second and fourth configurable dies are arranged in a second column, which is approximately parallel to the first column. The first electrical trace couples the first and third configurable dies, and the second electrical trace couples the second and third configurable dies. The second electrical trace is oblique with respect to the first electrical trace. The oblique trace improves the latency of signals transmitted between dies and thereby increases the circuit operating speed.