Package-on-Package Device Hybrid Bonding Integration
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The semiconductor industry faces challenges in reducing the size and increasing the integration density of semiconductor devices, particularly in packaging techniques, as existing methods struggle to efficiently stack and connect multiple dies while maintaining high-speed operation and cost-effectiveness.
Innovation Solution
The proposed solution involves forming die packages by bonding multiple semiconductor dies using hybrid bonding techniques, incorporating through substrate vias and dielectric vias, and connecting them to a redistribution structure with conductive features of varying sizes, allowing for reduced package size and improved high-speed operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If multiple semiconductor dies are stacked using Package-on-Package technology, then integration density and component density are improved, but device complexity and manufacturing difficulty increase
Solution Approach 1:
The patent divides the semiconductor device into multiple separate dies (first die, second die, third die) that are stacked vertically. Each die is processed and prepared independently before being bonded together, allowing for specialized processing of each layer while achieving high integration density in the final stacked configuration.
Solution Approach 2:
The patent implements a nested structure where multiple dies are stacked one on top of another (first die, then second die, then third die), with each die containing its own circuitry and interconnect structures. This nesting approach maximizes the use of vertical space to achieve high integration density while maintaining manageable complexity through modular design.
2Speed
If through substrate vias and dielectric vias are incorporated to connect multiple dies, then electrical connectivity and high-speed operation are improved, but manufacturing precision requirements increase
Solution Approach 1:
The patent forms through substrate vias and dielectric vias during the individual die processing stage, before the dies are bonded together. This preliminary formation of vias allows for precise alignment and connection structures to be created on each die separately, ensuring accurate electrical connectivity when the dies are stacked, thereby enabling high-speed operation without excessive manufacturing difficulty.
3Reliability
If hybrid bonding techniques are used to bond multiple dies, then bonding strength and reliability are improved, but processing time and cost increase
Solution Approach 1:
The patent combines multiple bonding approaches (hybrid bonding techniques including metal-to-metal bonding and dielectric-to-dielectric bonding) into a unified bonding process. By merging these bonding methods, the patent achieves both strong mechanical bonding and reliable electrical connectivity in a single integrated process, improving bonding reliability while managing processing time through efficient process integration.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the creation of smaller, more integrated semiconductor packages with enhanced high-speed performance and reduced processing costs by effectively connecting multiple dies within a single package structure.
Implementation Method 1
bonding multiple semiconductor dies using hybrid bonding techniques
Data Source
AI summary
A package includes a redistribution structure, a die package on a first side of the redistribution structure including a first die connected to a second die by metal-to-metal bonding and dielectric-to-dielectric bonding, a dielectric material over the first die and the second die and surrounding the first die, and a first through via extending through the dielectric material and connected to the first die and a first via of the redistribution structure, a semiconductor device on the first side of the redistribution structure includes a conductive connector, wherein a second via of the redistribution structure contacts the conductive connector of the semiconductor device, a first molding material on the redistribution structure and surrounding the die package and the semiconductor device, and a package through via extending through the first molding material to contact a third via of the redistribution structure.