Package-on-Package IC System for Compact Image Sensor Thermal Management
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Solution Overview
Problem
Current integrated circuit packaging methods result in bulky image sensor devices, occupying excessive space on circuit boards and failing to efficiently manage thermal and layout requirements in compact electronic products.
Innovation Solution
The integrated circuit package on package system involves forming a first substrate assembly with a second substrate having an auxiliary access port, exposing an integrated circuit die through this port, and coupling an external integrated circuit, which allows for reduced size and improved thermal efficiency by using a transparent filler as a lens and maintaining an air-tight seal.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If conventional packaging methods are used for image sensor dies, then the active area is protected, but the packaged device becomes bulky and occupies excessive space on circuit boards
Solution Approach 1:
The patent implements a package-on-package configuration where a first packaged device (containing the image sensor die) is positioned within a second packaged device. This nesting approach allows the image sensor to be protected while minimizing the overall footprint on the circuit board, as the stacked configuration utilizes vertical space rather than horizontal space.
Solution Approach 2:
The invention transitions from a conventional planar packaging layout to a three-dimensional stacked architecture. By moving components into the vertical dimension (stacking packages), the solution reduces the surface area occupied on the circuit board while maintaining adequate protection for the active area through the layered structure.
2Reliability
If high-performance microelectronic devices with more bond-pads are used, then device performance is improved, but the footprint on the printed circuit board increases
Solution Approach 1:
The patent employs a three-dimensional package-on-package stacking architecture that vertically integrates multiple high-performance devices. This allows multiple bond-pad arrays to be utilized in the vertical dimension rather than spreading them out horizontally, thereby maintaining high device performance while significantly reducing the footprint on the printed circuit board.
Solution Approach 2:
The invention combines multiple packaged devices (image sensor die and additional circuitry) into a single integrated package-on-package assembly. This consolidation allows high-performance devices with multiple bond-pads to be stacked and interconnected, achieving superior performance while occupying minimal PCB real estate through unified vertical integration.
3Volume of moving object
If compact packaging is implemented to reduce size, then space constraints are addressed, but thermal management becomes more challenging
Solution Approach 1:
The patent segments the thermal management function by incorporating dedicated heat dissipation structures within each package layer. The first and second packaged devices can each have independent thermal pathways, allowing heat generated in the compact stacked configuration to be efficiently conducted away through multiple separate routes, thus addressing thermal management challenges despite the reduced overall size.
Solution Approach 2:
The invention introduces thermal interface materials and heat spreader structures as intermediaries between the active components and the external environment. These intermediary elements facilitate efficient heat transfer from the densely packed components through the vertical stack, enabling effective thermal management in the compact package-on-package configuration.
Data Source
AI summary
An integrated circuit package on package system including: forming a first substrate assembly; forming a second substrate, having an auxiliary access port, supported by the first substrate assembly; exposing an integrated circuit die through the auxiliary access port; and coupling an external integrated circuit on the second substrate.