Package-on-Package Semiconductor Stacking with Metal Shielding
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Solution Overview
Problem
The semiconductor industry faces challenges in achieving smaller form factors, lower power consumption, and higher integration density due to increased leakage current from reduced feature sizes, which existing packaging techniques struggle to address effectively.
Innovation Solution
The implementation of a package-on-package semiconductor device with a metal shielding layer that covers the top surface and sidewalls of the top package and portions of the bottom package, providing reliable grounding and electromagnetic interference protection, while using a molding compound layer and interconnect structures to stack semiconductor dies and facilitate signal routing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If feature size is reduced to increase integration density, then more components can be integrated into a given area, but leakage current increases
Solution Approach 1:
The patent transitions from planar integration to three-dimensional package-on-package stacking, moving components into the vertical dimension. Multiple semiconductor packages are stacked and bonded together, with interconnect structures routing signals between packages, thereby achieving higher integration density without further reducing feature size.
Solution Approach 2:
The patent introduces intermediate transfer packages with bump interconnect structures that mediate between the lower and upper semiconductor packages. These intermediate structures facilitate signal and power transmission between stacked packages, enabling modular integration while maintaining electrical performance.
2Volume of moving object
If package-on-package stacking is implemented to reduce physical size, then smaller form factors are achieved, but manufacturing complexity increases
Solution Approach 1:
The patent divides the integrated system into separate semiconductor packages that are manufactured independently on different wafers. Each package is processed, tested, and then bonded to other packages, allowing modular manufacturing and reducing overall system complexity despite the three-dimensional architecture.
Solution Approach 2:
The patent performs preliminary processing, testing, and bonding of individual semiconductor packages before final assembly. Packages are prepared in advance with interconnect structures and bumped surfaces, then stacked and bonded together, streamlining the manufacturing process through staged preparation.
3Productivity
If multiple semiconductor packages are stacked to achieve higher density, then integration density increases, but signal routing complexity increases
Solution Approach 1:
The patent implements a nested hierarchical structure where semiconductor packages are stacked with intermediate transfer packages containing bump interconnects. Signal routing is organized in layers, with lower packages connecting to intermediate packages, which in turn connect to upper packages, creating a nested signal path architecture.
Solution Approach 2:
The patent routes signals through the vertical dimension by stacking packages and using z-axis interconnects. This three-dimensional signal routing approach allows multiple signal paths to be established without increasing planar trace density, managing routing complexity through spatial separation.
Data Source
AI summary
A device includes a semiconductor structure comprising a top package stacked on a bottom package, wherein the bottom package comprises a plurality of bottom package bumps on a bottom surface of the bottom package, a front side contact metal, a molding compound layer and a backside contact metal, and wherein the front side contact metal is between the plurality of bottom package bumps and the molding compound layer and a metal shielding layer on a top surface, sidewalls of the semiconductor structure and portions of a bottom surface of the bottom package, wherein the metal shielding layer is in direct contact with an edge of at least one of the front side contact metal and the backside contact metal.