Package on Package Stacking for High Density IC Assembly
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Solution Overview
Problem
Current integrated circuit package designs face challenges in increasing semiconductor die density, reliability, and manufacturing yield, particularly due to the difficulty in testing individual die before assembly and the inefficiency of using space on substrates, leading to assembly defects and reduced circuit miniaturization.
Innovation Solution
The integrated circuit package on package system employs an extended-lead integrated circuit package with a leadframe that serves as an interposer, allowing for individual testing of each package before assembly, and uses encapsulants to provide electrical connectivity and structural support, enabling efficient stacking of multiple circuits and improving reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If multiple IC devices are mounted side by side in a single horizontal layer on a substrate, then the packaging can accommodate multiple devices, but the substrate area consumed is large and board space is used inefficiently
Solution Approach 1:
The patent transitions from a two-dimensional horizontal arrangement of IC devices on a substrate to a three-dimensional vertical stacking configuration. Multiple IC devices are stacked vertically one on top of another, with each device connected to the substrate through vertical interconnect structures. This dimensional change allows multiple devices to be packaged in a much smaller substrate area, effectively increasing packaging density without consuming additional board space.
2Reliability
If IC devices are individually encapsulated in molded plastic or ceramic bodies after wire-bonding to leadframe, then each device is protected and connected, but the packaging process is time-consuming and reduces productivity
Solution Approach 1:
The patent merges multiple individual packaging operations into a single integrated process. Multiple IC devices are mounted on a common substrate and encapsulated together in a single molded plastic or ceramic body, rather than individually encapsulating each device. The leadframe structure is designed to accommodate multiple devices simultaneously, allowing parallel processing and significantly reducing the total packaging time while maintaining protection and electrical connections for all devices.
Solution Approach 2:
The substrate and leadframe structure serve multiple functions simultaneously: providing mechanical support for multiple IC devices, establishing electrical connections between devices and external circuitry, enabling vertical stacking configuration, and facilitating single-step encapsulation of all devices. This multi-functionality reduces the number of separate packaging steps required, thereby improving productivity.
3Reliability
If die are mounted and connected individually on a substrate, then each die can be tested individually for known-good-die status, but the assembly process is complex and time-consuming
Solution Approach 1:
The patent enables testing of IC devices at an earlier stage in the manufacturing process, before final assembly and encapsulation. Devices can be tested on the substrate while still accessible, allowing known-good-die identification prior to permanent packaging. This preliminary testing approach maintains high reliability by ensuring only functional devices are assembled, while the vertical stacking and common substrate design streamline the overall assembly process to compensate for the added testing step.
Data Source
AI summary
An integrated circuit package on package system including forming an interconnect integrated circuit package and attaching an extended-lead integrated circuit package on the interconnect integrated circuit package wherein a mold cap of the extended-lead integrated circuit package faces a mold cap of the interconnect integrated circuit package.