Package on Package Structure Thermal Via Substrate
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Solution Overview
Problem
Package on Package (PoP) structures face inefficiencies in thermal dissipation and warpage-induced ball cracking due to thermal expansion mismatch between components, leading to larger than desired profiles and reduced electronics density.
Innovation Solution
The implementation of a PoP structure with a bottom substrate having high thermal conductivity and a thermal expansion coefficient matching the die, coupled with a thermal conduction path through vias and connector elements, and the strategic use of underfill materials to reinforce connector elements and manage thermal expansion, while maintaining a low profile.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If die size is increased in PoP structure, then electronics density is improved, but thermal dissipation efficiency deteriorates
Solution Approach 1:
The patent segments the thermal management function by introducing through-vias that create dedicated thermal conduction pathways through the substrate, separating the thermal conduction path from the electrical signal paths. This allows heat from larger dies to be efficiently conducted away through specific thermal vias while maintaining the increased electronics density.
Solution Approach 2:
The patent introduces an intermediary thermal conduction path through the substrate using through-vias filled with high thermal conductivity material. This intermediary structure mediates between the heat-generating die and the heat sink, enabling efficient thermal dissipation even as die size increases and electronics density improves.
2Quantity of substance
If die size is increased in PoP structure, then electronics density is improved, but warpage induced ball cracking occurs due to thermal expansion mismatch
Solution Approach 1:
The patent changes the thermal expansion parameter by selecting substrate materials and through-via fill materials with thermal expansion coefficients matched to the die. This parameter matching reduces thermal expansion mismatch during temperature cycles, preventing warpage-induced ball cracking while allowing increased die size for higher electronics density.
Solution Approach 2:
The patent uses composite material construction with through-vias filled with materials having specific thermal and mechanical properties. This composite structure (substrate + via fill material) is designed to have thermal expansion characteristics that bridge the mismatch between die and solder balls, maintaining reliability as die size increases.
3Quantity of substance
If PoP structure components are bonded together, then electronics density is improved, but profile size becomes larger than desired
Solution Approach 1:
The patent transitions from horizontal stacking to vertical integration by routing thermal conduction paths through the substrate thickness (vertical dimension). This allows heat dissipation without increasing the horizontal profile, enabling higher electronics density while maintaining a compact package footprint through three-dimensional thermal management.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enhances thermal dissipation efficiency, reduces warpage-induced cracking, and allows for a higher density of devices with a low profile, effectively addressing thermal expansion mismatch and profile issues in PoP structures.
Implementation Method 1
a bottom substrate having high thermal conductivity and a thermal expansion coefficient matching the die
Implementation Method 2
a thermal conduction path through vias and connector elements
Implementation Method 3
thermal expansion mismatch between the components of the package
Data Source
AI summary
A package on packaging structure comprising a first package and a second package provides for improved thermal conduction and mechanical strength by the introduction of a thermally conductive substrate attached to the second package. The first package has a first substrate and a first integrated circuit. The second package has a second substrate containing through vias that has a first coefficient of thermal expansion. The second package also has a second integrated circuit having a second coefficient of thermal expansion located on the second substrate. The second coefficient of thermal expansion deviates from the first coefficient of thermal expansion by less than about 10 or less than about 5 parts-per-million per degree Celsius. A first set of conductive elements couples the first substrate and the second substrate. A second set of conductive elements couples the second substrate and the second integrated circuit.