Semiconductor Package Pad Structure for High-Temperature Adhesion

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Solution Overview

Problem

The existing semiconductor packages face adhesion issues between the insulating layer and the pad, leading to potential separation during subsequent processes, especially under high temperature conditions, due to insufficient surface roughness at the interface.

Innovation Solution

A semiconductor package design featuring a nonplanar structure on the surface of both the pad and the insulating layer, where the second metal layer forms a nonplanar side surface that increases surface roughness, enhancing adhesion, and a manufacturing method involving a photoresist film with a nonplanar surface to create this structure.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a planar structure is used for the pad and insulating layer interface, then the manufacturing process is simple, but the adhesion between the insulating layer and pad is insufficient

Engineering Contradiction:
Improveadhesion between insulating layer and padVSAvoidstructure of pad and insulating layer
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The invention applies a nonplanar surface structure to the pad, creating curvature and roughness on the surface that contacts the insulating layer. This nonplanar geometry increases the surface area and mechanical interlocking between the pad and insulating layer, thereby improving adhesion strength while maintaining a relatively simple manufacturing process using existing photolithography and plating techniques.

Inventive Principle:
Principle #14Spheroidality (Curvature)

2Reliability

If the insulating layer is formed on a smooth pad surface, then the formation process is easy, but separation occurs under high temperature conditions

Engineering Contradiction:
Improveresistance to separation under high temperatureVSAvoidsurface roughness control
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The nonplanar surface structure with controlled roughness and curvature provides mechanical interlocking that resists separation forces. The curved and rough surface features create physical anchors that prevent the insulating layer from delaminating under thermal stress, while the manufacturing precision is maintained through controlled formation processes.

Inventive Principle:
Principle #14Spheroidality (Curvature)

Solution Approach 2:

The invention changes the surface parameters of the pad from smooth to nonplanar with specific roughness characteristics. This parameter change in surface topology enhances the bonding interface without requiring fundamental changes to the manufacturing process, achieving improved thermal stability through surface geometry modification.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If a nonplanar structure is formed on the pad surface, then adhesion is improved, but the manufacturing process becomes more complex

Engineering Contradiction:
Improveadhesion between pad and insulating layerVSAvoidprocess for forming nonplanar structure
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The nonplanar structure is formed on the pad surface before the insulating layer is deposited. This preliminary action allows the complex surface geometry to be created while the pad is accessible, using standard photolithography and plating processes. The structure is prepared in advance, making the subsequent insulating layer formation straightforward and maintaining ease of manufacture.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS20250006606A1Semiconductor package and method for manufacturing the same
Publication Date: 2025.01.02 SAMSUNG ELECTRONICS CO LTD
  • US20250006606A1 patent drawing
  • US20250006606A1 patent drawing
  • US20250006606A1 patent drawing

AI summary

A semiconductor package may include: a substrate; a seed layer on a first surface of the substrate; a pad on the seed layer and including a first metal layer and a second metal layer on the first metal layer; an insulating layer on the first surface and including a side surface in contact with the second metal layer; and a semiconductor chip above a second surface of the substrate. An interface between the side surface of the insulating layer and the second metal layer may be nonplanar.