Package With Passive Devices And I/O Pad Density
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Solution Overview
Problem
As semiconductor dies become smaller, conventional packaging technologies face challenges in increasing the number of I/O pads due to limited pitch and area constraints, leading to issues such as solder bridges and reduced packaging efficiency.
Innovation Solution
The implementation of a package structure with integrated passive devices (IPDs) that includes a substrate with a metal pad, passivation layers, and a metal pillar redistribution line (RDL) to redistribute I/O pads over a larger area, allowing for increased pad density without additional lithography steps and providing new routing options.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the pitch of I/O pads is decreased to increase pad density, then the number of I/O pads increases, but solder bridges may occur
Solution Approach 1:
The patent transitions from planar pad arrangement to three-dimensional stacking by forming via holes through the substrate that connect upper and lower pads. This vertical dimension allows multiple I/O pads to be packed in a compact footprint without reducing pitch, thereby increasing pad density while maintaining solder joint reliability through proper via isolation and connection.
2Quantity of substance
If fan-in packaging is used to maintain small die size, then manufacturing cost is reduced, but the number of I/O pads is limited by die area
Solution Approach 1:
The invention utilizes the substrate thickness dimension by forming via holes that extend vertically through the substrate. This allows I/O pads to be arranged in multiple layers (upper and lower surfaces), effectively increasing the functional area available for pad placement without increasing the die footprint, thus enabling higher I/O pad counts in fan-in packaging.
Solution Approach 2:
The patent implements a nested structure where via holes are formed within the substrate, connecting upper and lower pad layers. The via holes act as nested conductive pathways that integrate multiple I/O connections within the compact die area, allowing fan-in packaging to achieve higher pad densities by nesting connections in the vertical dimension.
3Quantity of substance
If fan-out packaging is used to increase I/O pad density, then more pads can be packed, but additional lithography steps are required
Solution Approach 1:
The substrate serves multiple functions simultaneously: it acts as a mechanical support structure, provides electrical isolation between pads, and contains conductive via holes for inter-layer connections. This multi-functionality allows the same substrate structure to enable increased I/O pad density without requiring separate additional lithography processes for via formation, as the via holes are formed through the substrate using the same patterning steps.
Data Source
AI summary
An embodiment is a device comprising a substrate, a metal pad over the substrate, and a passivation layer comprising a portion over the metal pad. The device further comprises a metal pillar over and electrically coupled to the metal pad, and a passive device comprising a first portion at a same level as the metal pillar, wherein the first portion of the passive device is formed of a same material as the metal pillar.


