Reinforcement Structure for FoCoS Package Delamination Prevention

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

In multi-chip products like fan-out chip on substrate (FoCoS) packages, the underfill between semiconductor chips delaminates due to thermal expansion mismatch between the heat sink, wiring structure, and semiconductor chips, leading to potential damage of the wiring structure and reduced yield.

Innovation Solution

A package structure with a redistribution structure, electronic devices, protection material, heat dissipation structure, and reinforcement structure, where the reinforcement structure is positioned between the heat dissipation structure and protection material to absorb pulling forces and prevent delamination, and a manufacturing method involving bonding and attaching these components.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Temperature

If heat sink is attached to semiconductor chips for heat dissipation, then heat dissipation performance is improved, but underfill delamination occurs due to thermal expansion mismatch

Engineering Contradiction:
Improveheat dissipation performanceVSAvoidunderfill delamination resistance
Core Design Contradiction:
TemperatureVSReliability

Solution Approach 1:

The patent introduces an underfill material as an intermediary substance between the semiconductor chip and the heat sink. This underfill has a coefficient of thermal expansion that matches both the chip and the heat sink, serving as a buffer that absorbs thermal expansion differences during thermal cycling, thereby preventing delamination while maintaining heat dissipation functionality.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent modifies the material parameters of the underfill, specifically selecting materials with controlled coefficients of thermal expansion that fall within a specific range (6-14 ppm/°C). By changing this critical parameter, the underfill can accommodate thermal expansion mismatches between components with different CTEs, preventing mechanical failure during thermal cycling.

Inventive Principle:
Principle #35Parameter changes

2Stability of the object's composition

If heat sink and wiring structure have close CTEs greater than chip CTEs, then thermal expansion compatibility is improved, but opposite pulling force causes underfill delamination

Engineering Contradiction:
Improvethermal expansion compatibilityVSAvoidbonding strength of underfill
Core Design Contradiction:
Stability of the object's compositionVSStrength

Solution Approach 1:

The patent changes the material parameters of the underfill by selecting materials with specific mechanical properties including tensile strength ≥5 MPa, elongation ≥5%, and controlled CTE (6-14 ppm/°C). These parameter changes enable the underfill to withstand the opposite pulling forces generated during thermal cycling while maintaining bonding strength.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent employs composite underfill materials that combine multiple components to achieve the desired balance between thermal expansion compatibility and mechanical strength. The composite structure allows the underfill to simultaneously match thermal expansion characteristics and provide sufficient bonding strength to resist delamination forces.

Inventive Principle:
Principle #40Composite materials

3Reliability

If underfill cannot withstand opposite pulling force, then delamination occurs, but crack formation damages wiring structure

Engineering Contradiction:
Improvepackage integrityVSAvoidcrack propagation to wiring structure
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent applies beforehand cushioning by designing the underfill with enhanced mechanical properties (tensile strength ≥5 MPa, elongation ≥5%) that provide a buffer against the opposite pulling forces generated during thermal cycling. This pre-engineered cushioning prevents delamination before cracks can form and propagate to the wiring structure, protecting the package integrity.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

4Strength

If semiconductor chip hardness is greater than underfill hardness, then chip structural integrity is improved, but underfill is more susceptible to delamination

Engineering Contradiction:
Improvechip structural integrityVSAvoidunderfill bonding stability
Core Design Contradiction:
StrengthVSReliability

Solution Approach 1:

The patent changes the material parameters of the underfill by selecting materials with controlled hardness that is lower than the chip hardness, allowing the underfill to deform and absorb stress during thermal cycling. This parameter adjustment makes the underfill more compliant and less susceptible to delamination while the harder chip maintains its structural integrity.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The reinforcement structure enhances delamination resistance, improving the reliability and yield of the package by preventing crack formation and reducing thermal resistance between the heat dissipation structure and electronic devices.

Implementation Method 1

the coefficients of thermal expansion (CTEs) of the heat sink and the wiring structure are very close and may be greater than the CTEs of the semiconductor chips and the underfill. Also, a hardness of the semiconductor chip is greater than a hardness of the underfill. Thus, in a thermal cycling, the underfill between the semiconductor chips may be delaminated due to unable to withstand the opposite pulling force generated by the heat sink and the wiring structure

Methodology Applied
Scientific EffectThermal expansion: Thermal Expansion

Implementation Method 2

a heat sink is attached to semiconductor chips so as to dissipate the heat generated from the semiconductor chips during operation

Methodology Applied
Scientific EffectHeat dissipation: Heat Sink

Data Source

PatentUS20220093528A1Package structure and method for manufacturing the same
Publication Date: 2022.03.24 ADVANCED SEMICON ENG INC
  • US20220093528A1 patent drawing
  • US20220093528A1 patent drawing
  • US20220093528A1 patent drawing

AI summary

A package structure and a method for manufacturing the same are provided. The package structure includes a redistribution structure, a first electronic device, at least one second electronic device, a protection material, a heat dissipation structure and a reinforcement structure. The first electronic device is disposed on the redistribution structure. The second electronic device is disposed on the redistribution structure. The protection material is disposed between the first electronic device and the second electronic device. The heat dissipation structure is disposed on the first electronic device and the second electronic device. The reinforcement structure is disposed in an accommodating space between the heat dissipation structure and the protection material.