Semiconductor Package Ring Structure for CTE Stress Relief

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Solution Overview

Problem

The integration of semiconductor devices and electronic components into a given volume leads to stress concentration and warpage issues due to coefficient of thermal expansion (CTE) mismatches between materials.

Innovation Solution

A package structure is developed with a semiconductor device and a ring structure disposed over a substrate, featuring a supporting structure embedded in the substrate made of metallic material, which suppresses CTE mismatch and reduces stress concentration. Additionally, a lid is used for enhanced heat dissipation and electromagnetic interference shielding.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If semiconductor devices and electronic components are integrated into a given volume to achieve high integration density, then the quantity of devices per volume increases, but stress concentration and warpage issues occur due to CTE mismatches between materials

Engineering Contradiction:

Improveintegration densityVSAvoidstress concentration

Core Design Contradiction:

Quantity of substanceVSReliability

Solution Approach 1:

A stress relief structure is introduced as an intermediary element between the substrate and the semiconductor device. This stress relief structure has a CTE that matches the substrate, acting as a mediator to gradually transition the thermal expansion characteristics and reduce the abrupt stress concentration at the interface between materials with mismatched CTEs.

Inventive Principle:

Principle #24Intermediary (Mediator)

Solution Approach 2:

The stress relief structure is formed using a composite material approach, where a dielectric material is combined with a metallic material (such as copper) to create a structure with tailored mechanical and thermal properties. This composite structure provides both electrical connectivity and stress management capabilities.

Inventive Principle:

Principle #40Composite materials

2Adaptability or versatility

If multiple materials with different CTEs are used in the package structure, then functional performance is improved, but warpage issues occur due to CTE mismatches

Engineering Contradiction:

Improvefunctional performanceVSAvoidwarpage

Core Design Contradiction:

Adaptability or versatilityVSStability of the object's composition

Solution Approach 1:

The stress relief structure is selectively positioned at specific locations where CTE mismatch causes the most significant warpage. By localizing the stress relief function to critical areas rather than uniformly distributing it throughout the entire package, the solution effectively addresses warpage issues while maintaining the functional benefits of multiple materials with different CTEs.

Inventive Principle:

Principle #3Local quality

3Reliability

If a supporting structure made of metallic material is embedded in the substrate, then CTE mismatch is suppressed and stress concentration is reduced, but device complexity increases

Engineering Contradiction:

Improvestress concentrationVSAvoidpackage structure

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The stress relief structure is merged with the existing substrate structure by forming it within the dielectric material that is already part of the substrate architecture. This integration approach allows the stress relief function to be incorporated into the existing package design without adding separate, discrete components, thereby minimizing the increase in device complexity.

Inventive Principle:

Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively reduces stress concentration and warpage issues, enhances heat dissipation, and provides electromagnetic interference shielding, thereby improving the reliability and performance of semiconductor devices.

Implementation Method 1

stress concentration and warpage issues due to coefficient of thermal expansion (CTE) mismatches between materials

Methodology Applied

Scientific EffectCoefficient of thermal expansion (CTE) mismatch: Thermal Expansion

Implementation Method 2

a lid is used for enhanced heat dissipation

Methodology Applied

Scientific EffectHeat dissipation: Convection

Implementation Method 3

a lid is used for enhanced heat dissipation and electromagnetic interference shielding

Methodology Applied

Scientific EffectElectromagnetic interference shielding: Faraday Cage

Data Source

PatentUS12237277B2Package structure and methods of manufacturing the same

Publication Date: 2025.02.25 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

AI summary

A package structure includes a circuit substrate, a semiconductor device and a ring structure. The circuit substrate has a first region and a second region connected thereto. The circuit substrate includes at least one routing layer including a dielectric portion and a conductive portion disposed thereon. A first ratio of a total volume of the conductive portion of the routing layer within the first region to a total volume of the dielectric and conductive portions of the routing layer within the first region is less than a second ratio of a total volume of the conductive portion of the routing layer within the second region to a total volume of the dielectric and conductive portions of the routing layer within the second region. The semiconductor device is disposed over the circuit substrate within the first region, and is electrically coupled to the circuit substrate. The ring structure is disposed over the circuit substrate within the second region.