Electronic Package Routing Structure for Faster Inter-Module Signaling

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Solution Overview

Problem

Conventional semiconductor packages have slow communication speeds, especially in high-data-rate applications like AI and HPC, due to limited connectivity between chip packaging modules, which hampers their applicability and operational efficiency.

Innovation Solution

The electronic package incorporates a carrier component with a routing structure, including a redistribution layer, and features a chip packaging module, an electronic element with contacts, and an electronic connector, all electrically connected to the routing structure, enabling faster signal transmission by bypassing the substrate for direct communication between modules.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If communication between chip packaging modules is transmitted through the substrate structure, then the package structure is simple, but the transmission speed is slow

Engineering Contradiction:
Improvetransmission speedVSAvoidpackage structure complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent introduces a carrier component as an intermediary structure between chip packaging modules. The carrier component includes a routing structure with signal transmission paths that enable direct communication between modules without relying on the substrate structure, thereby increasing transmission speed while maintaining structural organization

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent transitions from two-dimensional substrate-based communication to three-dimensional module-to-module communication through the carrier component. The routing structure provides dedicated signal paths in the vertical dimension, allowing direct connection between chips on different modules and eliminating the need for long horizontal paths through the substrate

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Productivity

If the package size is increased to include high-performance computing elements, then the computational capability is improved, but the communication between chip packaging modules becomes more difficult to meet operational requirements

Engineering Contradiction:
Improvecomputational capabilityVSAvoidcommunication speed
Core Design Contradiction:
ProductivityVSSpeed

Solution Approach 1:

The patent divides the large package into multiple independent chip packaging modules, each containing high-performance computing elements. The carrier component provides a segmented routing structure that enables localized communication within modules while also facilitating inter-module communication, thereby maintaining high computational capability with improved communication efficiency

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The carrier component acts as a mediator that coordinates communication between multiple chip packaging modules. It provides dedicated routing paths that shorten communication distances and reduce interference, enabling high-speed data exchange between modules containing computationally intensive elements

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS12176291B2Electronic package and manufacturing method thereof
Publication Date: 2024.12.24 SILICONWARE PRECISION IND CO LTD
  • US12176291B2 patent drawing
  • US12176291B2 patent drawing
  • US12176291B2 patent drawing

AI summary

An electronic package is provided in which a chip packaging module, an electronic element having a plurality of contacts, and an electronic connector are disposed on a routing structure of a carrier component, so as to communicatively connect with the chip packaging module via the electronic element and the electronic connector, thereby increasing a signal transmission speed.