Semiconductor Package Shielding Structure for Thermal Stress Cracks

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Solution Overview

Problem

Existing semiconductor device packaging structures are unsatisfactory as they fail to adequately manage thermal stress between semiconductor devices and substrates with different coefficients of thermal expansion, leading to cracks and device failures, especially in larger packages.

Innovation Solution

A semiconductor device package design featuring a redistribution layer with a top metal layer or contact pad that shields stress, preventing cracks from propagating through layers, and is sized to prevent interference with metal routing, including a UBM structure with an upper portion over a passivation layer and a lower portion conformally formed along sidewalls, and a method for determining contact pad deployment based on thermal expansion differences and routing needs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a semiconductor device package is bonded to a substrate with different coefficient of thermal expansion, then electrical connection is achieved, but thermal stress causes cracks and device failures

Engineering Contradiction:

Improvedevice reliabilityVSAvoidthermal stress

Core Design Contradiction:

ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent introduces a stress shielding structure comprising a contact pad and an under-bump metallization (UBM) layer as intermediary elements between the bump and the passive device. The contact pad is configured to shield stress from the passive device, while the UBM layer with its conformal sidewall structure provides gradual stress transition. These intermediary structures absorb and distribute thermal stress, preventing crack propagation through the passive device despite CTE mismatch between the semiconductor package and substrate.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Reliability

If contact pad size is increased to shield stress, then crack prevention is improved, but metal routing is interfered with

Engineering Contradiction:

Improvecrack resistanceVSAvoidmetal routing

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies local quality by creating a non-uniform UBM layer structure where the conformal sidewall portions are selectively formed along the sidewalls of the recess in the passivation layer. This localized conformal structure provides stress shielding exactly where needed at the stress concentration points (sidewalls), while the contact pad maintains standard dimensions for routing compatibility. The stress shielding function is achieved through localized structural modification rather than overall size increase.

Inventive Principle:

Principle #3Local quality

3Reliability

If UBM layer is formed conformally along sidewalls, then stress distribution is improved, but manufacturing complexity increases

Engineering Contradiction:

Improvestress distributionVSAvoidUBM formation

Core Design Contradiction:

ReliabilityVSEase of manufacture

Solution Approach 1:

The patent employs preliminary action by first forming a recess in the passivation layer to expose the contact pad, then forming the UBM layer conformally along the sidewalls of this pre-created recess. This sequence allows the UBM to be deposited in a controlled manner following the predefined recess geometry, achieving conformal sidewall coverage without requiring complex simultaneous multi-step processes. The recess structure serves as a pre-prepared template that guides the conformal UBM formation.

Inventive Principle:

Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The design effectively reduces stress on devices, prevents cracks, and maintains adequate metal routing, enhancing the reliability and performance of semiconductor device packages, particularly in larger formats exceeding 500 mm2.

Implementation Method 1

A contact pad is disposed over the passive device. A passivation layer is disposed over the contact pad. An under-bump metallization (UBM) layer includes a lower portion conformally formed along sidewalls of the recess and an upper portion over the passivation layer

Methodology Applied

Scientific EffectStress shielding:

Implementation Method 2

Methodology Applied

Scientific EffectThermal expansion: Thermal Expansion

Data Source

PatentUS11855022B2Shielding structures

Publication Date: 2023.12.26 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

AI summary

Semiconductor device packages and method are provided. A semiconductor device package according to the present disclosure includes a substrate including a first region, a passive device disposed over the first region of the substrate, a contact pad disposed over the passive device, a passivation layer disposed over the contact pad, a recess through the passivation layer, and an under-bump metallization (UBM) layer. The recess exposes the contact pad and the UBM layer includes an upper portion disposed over the passivation layer and a lower portion disposed over a sidewall of the recess. A projection of the upper portion of the UBM layer along a direction perpendicular to the substrate falls within an area of the contact pad.