Semiconductor Package Sidewall Isolation for Higher Dielectric Strength
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Solution Overview
Problem
Semiconductor devices with insulating elements face challenges in dielectric strength, particularly when semiconductor elements with significantly different source voltages are mounted in a single package, and existing solutions like photocouplers are not suitable for high-speed switching due to signal delay and size constraints.
Innovation Solution
A semiconductor device configuration with a conductive support having die pads and terminals arranged to ensure that no metal components of the support are exposed from the sealing resin near higher voltage terminals, enhancing dielectric strength by isolating higher voltage components from lower voltage ones.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If terminals are exposed from side surfaces of sealing resin to improve electrical connection, then ease of operation is improved, but dielectric strength deteriorates due to risk of electrical discharge
Solution Approach 1:
The patent changes the exposure dimension from side surfaces to upper surface only. Terminals are configured to extend through the sealing resin so that their tips are exposed from the upper surface, while side surfaces remain covered. This dimensional change allows electrical connection while maintaining dielectric strength by eliminating side surface exposure.
Solution Approach 2:
The patent applies different exposure characteristics to different terminals based on their voltage levels. High voltage terminals are fully covered by sealing resin with no exposure, while low voltage terminals have their tips exposed from the upper surface. This local differentiation allows electrical connection where needed while protecting high voltage areas.
2Reliability
If distance between high voltage and low voltage terminals is increased to improve dielectric strength, then reliability is improved, but device size increases
Solution Approach 1:
The patent applies different sealing resin coverage to different terminals based on voltage levels. High voltage terminals receive enhanced coverage with sealing resin extending closer to or covering the terminal tips, while low voltage terminals have reduced coverage allowing tip exposure. This local differentiation achieves high dielectric strength in critical areas without increasing overall device size.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively improves dielectric strength by preventing metal components from the conductive support from being exposed to higher voltages, reducing the risk of electrical discharge and enhancing the overall reliability of the semiconductor device.
Implementation Method 1
a sealing resin that covers metal components of the conductive support not encapsulated by the sealing resin, while also covering the semiconductor element circuit and the die pad
Data Source
AI summary
A semiconductor device includes a semiconductor element circuit, a conductive support and a sealing resin. The conductive support includes a die pad, first terminals spaced in a first direction, second terminals spaced in the first direction and opposite to the first terminals in a second direction perpendicular to the first direction, and a support terminal connected to the die pad. The sealing resin encapsulates portions of the first and second terminals, a portion of the support terminal, the semiconductor element circuit and the die pad. The sealing resin has two first side surfaces spaced apart in the second direction and two second side surfaces spaced apart in the first direction. The first terminals and second terminals are exposed from the first side surfaces, while none of the elements of the conductive support is exposed from the second side surfaces.