Semiconductor Package Singulation for Visible Solder Fillets

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Solution Overview

Problem

Conventional semiconductor package singulation processes result in irregular side surface geometries that obstruct the visual inspection of solder fillets, leading to defective packages being shipped and diminished yield due to post-functional testing singulation damage.

Innovation Solution

A two-part sawing process is employed, first partially sawing through the array of semiconductor packages with a specific blade, followed by using a narrower blade to fully saw through the kerf, and followed by burr removal and functional testing to ensure proper side surface geometries for visual inspection.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If a conventional single-pass sawing process is used for singulation, then manufacturing speed is improved, but side surface geometry precision deteriorates resulting in irregular surfaces that obstruct visual inspection

Engineering Contradiction:
Improvemanufacturing speedVSAvoidside surface geometry precision
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The singulation process is divided into two distinct stages: a roughing pass that removes the majority of material to create a preliminary kerf, and a finishing pass that precisely completes the cut to achieve the required side surface geometry. This segmentation allows each stage to be optimized independently - the roughing pass for speed and the finishing pass for precision - thereby resolving the contradiction between manufacturing speed and side surface geometry precision.

Inventive Principle:
Principle #1Segmentation

2Productivity

If singulation is performed after functional testing, then manufacturing yield is improved by identifying defective packages early, but side surface geometry precision deteriorates due to damage from the sawing process

Engineering Contradiction:
Improvemanufacturing yieldVSAvoidside surface geometry precision
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The high-precision finishing pass is performed before functional testing, ensuring that the side surface geometry is already optimized for visual inspection. This preliminary action prevents subsequent damage to the precision surfaces during or after testing, allowing defective packages to be identified through visual inspection of the intact solder fillets without compromising the side surface geometry.

Inventive Principle:
Principle #10Preliminary action

3Manufacturing precision

If the saw blade width is reduced to improve side surface geometry, then manufacturing precision is improved, but productivity deteriorates due to increased processing time

Engineering Contradiction:
Improveside surface geometry precisionVSAvoidprocessing speed
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The cutting process is segmented into two passes with different blade width requirements. The roughing pass uses a wider blade for rapid material removal, while the finishing pass uses a narrower blade for precision work. This segmentation allows the system to achieve high precision without sacrificing overall productivity, as the majority of material is removed quickly in the first pass.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The roughing pass intentionally removes more material than strictly necessary (excessive action), creating a kerf that extends beyond the final required geometry. This allows the subsequent finishing pass to focus solely on achieving the precise side surface geometry with a narrow blade, rather than attempting to cut the final geometry directly which would require excessive time.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS20250336730A1Package geometries to enable visual inspection of solder fillets
Publication Date: 2025.10.30 TEXAS INSTRUMENTS INC
  • US20250336730A1 patent drawing
  • US20250336730A1 patent drawing
  • US20250336730A1 patent drawing

AI summary

In examples, a method of manufacturing a semiconductor package comprises providing an array of unsingulated semiconductor packages, the array having a bottom surface and a conductive terminal exposed to the bottom surface, the conductive terminal including a slot configured to receive solder material. The method includes coupling a tape to the array of unsingulated semiconductor packages and applying a first saw blade to the bottom surface of the array to partially saw through a thickness of the array to a depth between two individual, adjacent, unsingulated semiconductor packages in the array of unsingulated semiconductor packages, the first saw blade producing a kerf. The method includes applying a second saw blade into the kerf to fully saw through the thickness of the array and produce a singulated semiconductor package, a width of the second saw blade narrower than the first saw blade. The conductive terminal is exposed to a side surface of the singulated semiconductor package, the side surface including a recessed area having a horizontal depth of no more than 30 microns.