Electronic Package Slope Surface Stress Dispersion
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Solution Overview
Problem
Conventional semiconductor packages face issues with stress concentration due to underfill and encapsulation layer formation, leading to cracks and reduced reliability.
Innovation Solution
The electronic package design features a carrier structure with electronic components having active and non-active faces of different widths, forming a slope surface and space between components, which is encapsulated by a layer to disperse stress and prevent cracking.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If underfill and encapsulation layer are formed at corners or edges of non-active faces, then complete coverage and protection are achieved, but internal stress increases and stress concentration occurs leading to cracks
Solution Approach 1:
The patent applies local quality by forming the encapsulation layer with different thicknesses at different locations. Specifically, the encapsulation layer has a first thickness at corners/edges and a second thickness (greater than the first) at regions adjacent to side faces, creating localized stress distribution optimization. This resolves the contradiction by maintaining complete coverage while reducing stress concentration at critical corners and edges through strategic thickness variation.
Solution Approach 2:
The patent changes the physical parameter of encapsulation layer thickness to resolve the stress concentration problem. By varying the thickness parameter spatially (first thickness at corners, second greater thickness at side-face adjacent regions), the patent optimizes stress distribution throughout the package structure, preventing crack initiation while maintaining protective coverage.
2Strength
If encapsulation layer is formed to cover semiconductor components, then protection and encapsulation are achieved, but stress concentration at corners and edges leads to cracking
Solution Approach 1:
The patent implements local quality by creating non-uniform encapsulation layer thickness. The layer has a first thickness at corners and edges where stress concentration is problematic, and a second greater thickness at regions adjacent to side faces. This localized thickness variation provides enhanced protection where needed while mitigating stress concentration effects, resolving the contradiction between protective coverage and stress-induced cracking.
Solution Approach 2:
The patent applies beforehand cushioning by pre-designing the encapsulation layer thickness distribution to anticipate and prevent stress concentration. The greater thickness at regions adjacent to side faces acts as a stress-distributing cushion before external stresses are applied, preventing crack initiation at vulnerable corners and edges while maintaining overall protective coverage.
Data Source
AI summary
An electronic package and a method for manufacturing the electronic package are provided. The method includes forming a slope surface on at least one side surface of at least one of a plurality of electronic components, and then disposing the plurality of electronic components on a carrier structure, such that the two adjacent electronic components form a space by the slope surface. Afterwards, an encapsulation layer is formed on the carrier structure and filled into the space to cover the two adjacent electronic components so as to disperse stress on the electronic components through the design of the space to prevent cracking due to stress concentration.