Semiconductor Package Socket Layout for Low-Reflection Board Connections

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Solution Overview

Problem

Package-on-interposer (PoINT) technology in semiconductor devices experiences performance degradation due to additional impedance discontinuities and signal reflection as data rates increase, primarily because of the extra transition layers between the interposer, socket, and circuit board.

Innovation Solution

Bypassing the interposer for certain signals by directly connecting semiconductor packages to the circuit board through a socket, positioning components directly on the interposer, and reducing the number of transition layers to minimize impedance discontinuities.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If PoINT technology is used to connect semiconductor packages to circuit boards, then device integration and flexibility are improved, but signal integrity and performance deteriorate due to additional impedance discontinuities and signal reflection

Engineering Contradiction:
Improvedevice integrationVSAvoidsignal integrity
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent segments the interconnection path by providing separate interconnect structures: first interconnects for signals passing through the interposer, and second interconnects for signals bypassing the interposer. This segmentation allows different signal paths to be optimized independently, resolving the contradiction between integration flexibility and signal integrity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces an interposer as an intermediary component with specific features (cutouts, openings) that mediates between the semiconductor package and circuit board. The interposer provides mechanical support and electrical interconnection while allowing selective signal bypass, thus maintaining both integration benefits and signal integrity.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Adaptability or versatility

If additional transition layers are added between interposer, socket, and circuit board, then device functionality is enhanced, but signal reflection and impedance discontinuities increase

Engineering Contradiction:
Improvedevice functionalityVSAvoidsignal reflection
Core Design Contradiction:
Adaptability or versatilityVSObject-generated harmful factors

Solution Approach 1:

The patent extracts certain signals from the traditional path through the interposer and socket by providing direct interconnects from the semiconductor package to the circuit board. This extraction eliminates the harmful impedance discontinuities and signal reflection that would otherwise occur at the additional transition layers.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent adds a dimensional aspect to signal routing by creating a three-dimensional interconnection architecture where signals can travel through different paths (through the interposer, through the socket, or directly bypassing both). This multi-dimensional approach allows optimization of signal paths to minimize reflection while maintaining functionality.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS20250280499A1Methods and apparatus to connect a semiconductor package to a circuit board
Publication Date: 2025.09.04 INTEL CORP
  • US20250280499A1 patent drawing
  • US20250280499A1 patent drawing
  • US20250280499A1 patent drawing

AI summary

Systems, apparatus, articles of manufacture, and methods to connect a semiconductor package to a circuit board are disclosed. An example apparatus includes an interposer having a first side and a second side opposite the first side. A semiconductor package couples to the first side of the interposer via first contacts on a first surface of the semiconductor package. The semiconductor package includes second contacts on the first surface of the semiconductor package. The second contacts spaced apart from the first contacts. The second contacts to electrically couple to third contacts in a socket dimensioned to receive the interposer and the semiconductor package.