Semiconductor Package Structure Eliminating Solder Mask Cracks
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Solution Overview
Problem
Conventional semiconductor package structures face challenges such as high costs and complex processes due to the need for dielectric layers and lithography processes, which hinder mass production and result in product yield issues like cracks in the solder mask layer.
Innovation Solution
A package structure featuring a base body with a wiring layer and encapsulants made of polymer materials like epoxy resin, where the wiring layer is made of gold, palladium, or nickel, and the encapsulants provide an even surface for chip placement, eliminating the need for a solder mask layer and lithography processes, and incorporating conductive posts for stacking.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a dielectric layer and wiring layer are formed on a metal plate using sputtering and lithography processes, then conductive traces can be arranged and bonding wires can be shortened, but the manufacturing cost increases and the process becomes complicated
Solution Approach 1:
The invention extracts and removes the dielectric layer from the package structure, retaining only the essential wiring layer formed on the metal plate. This eliminates the need for forming dielectric layers and performing complex lithography processes, while still maintaining the ability to arrange conductive traces and shorten bonding wires for improved electrical performance
Solution Approach 2:
The invention uses a simple wiring layer structure without requiring expensive dielectric materials and complex lithography processes. The wiring layer can be formed using more cost-effective methods such as electroplating, making the package suitable for mass production while still achieving the goal of arranging conductive traces
2Reliability
If a solder mask layer is formed and lithography processes are performed to create openings, then electrical connections can be established, but cracks occur in the solder mask layer and product yield decreases
Solution Approach 1:
The invention removes the solder mask layer from the package structure, eliminating the source of cracks that occur during lithography processes. The electrical connections are established directly through the wiring layer and contact pads on the metal plate without requiring a solder mask layer and complex lithography openings
Solution Approach 2:
The invention eliminates the need for expensive solder mask materials and complex lithography processes. Instead, simple electroplated contact pads on the metal plate serve as the electrical connection interface, improving product yield by removing the crack-prone solder mask layer while maintaining effective electrical connections
3Device complexity
If conventional carrier-free package processes are used without conductive traces, then the package structure is simple, but lengthy bonding wires are required which increase cost and adversely affect electrical performance
Solution Approach 1:
The invention merges the functions of the metal plate, wiring layer, and contact pads into a unified base body structure. The wiring layer is directly formed on the metal plate using electroplating, creating integrated conductive traces that eliminate the need for lengthy bonding wires while maintaining package structure simplicity
Solution Approach 2:
The invention replaces the mechanical bonding wire system with an electroplated wiring layer system. Instead of using physical bonding wires to create electrical connections, conductive traces are directly formed on the metal plate through electroplating, significantly shortening the connection path and improving electrical performance while keeping the package structure simple
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution reduces costs, enhances product quality by preventing cracks, and facilitates mass production by eliminating the need for a solder mask layer and complex lithography processes, while maintaining effective electrical connections.
Implementation Method 1
encapsulants made of polymer materials like epoxy resin, where the wiring layer is made of gold, palladium, or nickel, and the encapsulants provide an even surface for chip placement
Data Source
AI summary
A package structure includes a base body having a first encapsulant and a wiring layer embedded in and exposed from the first encapsulant. The wiring layer has a plurality of conductive traces and a plurality of first electrical contact pads. The first encapsulant has openings for exposing the first electrical contact pads, a chip electrically connected to the wiring layer, and a second encapsulant formed on the base body for covering the chip and the wiring layer, thereby providing an even surface for preventing the encapsulant from cracking when the chip is mounted.