Package Substrate Openings for Chip-Molding Adhesion
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Solution Overview
Problem
The existing semiconductor packaging process faces issues with adhesion force weakness between the semiconductor chip and the molding member, leading to delamination and crack formation due to voids generated during the attachment process, which can damage the package substrate.
Innovation Solution
A package substrate design featuring conductive patterns, insulation layers, and reinforcement patterns with strategically placed openings to allow gas discharge and filled with a molding member that includes interlocking portions to reinforce adhesion and prevent crack spread.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a gas discharge path is not provided during the molding process, then the molding member can fully cover the semiconductor chip, but gas accumulates to form voids that weaken adhesion between the chip and molding member
Solution Approach 1:
The first insulation layer is segmented by forming openings at specific positions to create gas discharge paths. This segmentation allows gas to escape during the molding process, preventing void formation and maintaining strong adhesion between the semiconductor chip and molding member, while keeping the overall structure relatively simple.
Solution Approach 2:
The openings in the first insulation layer act as intermediary channels that facilitate gas discharge during the molding process. These openings serve as a mediator between the trapped gas and the external environment, allowing controlled gas escape without compromising the integrity of the semiconductor chip or molding member.
2Reliability
If the interface between semiconductor chip and molding member is weak, then manufacturing is simpler, but stress concentration causes delamination and crack formation during reliability testing
Solution Approach 1:
The reinforcement pattern is formed in advance on the first conductive pattern before the molding process. This preliminary reinforcement strengthens the interface area where stress concentration occurs during reliability testing, preventing delamination and crack formation without adding complexity to the overall manufacturing process.
Solution Approach 2:
The reinforcement pattern is applied locally at the interface between the semiconductor chip and molding member where stress concentration occurs. This localized reinforcement provides enhanced resistance to delamination and crack formation only where needed, rather than strengthening the entire structure uniformly.
3Reliability
If openings are formed in the insulation layer to discharge gas, then void formation is prevented, but the structural integrity of the insulation layer is compromised
Solution Approach 1:
The positions, sizes, and shapes of the openings in the first insulation layer are optimized to achieve the right balance between gas discharge capability and structural integrity. By carefully controlling these parameters, the openings effectively prevent void formation while maintaining sufficient structural strength.
Solution Approach 2:
The package substrate employs a composite structure combining the first insulation layer with openings, the reinforcement pattern on the first conductive pattern, and the second insulation layer. This composite design compensates for the structural weakening caused by openings through the reinforcing elements, maintaining overall structural integrity while enabling effective gas discharge.
Data Source
AI summary
A package substrate may include first conductive patterns, a first insulation layer and a second insulation layer. The first conductive patterns may be electrically connected with a semiconductor chip. The first insulation layer may be on an upper surface and side surfaces of each of the first conductive patterns. The first insulation layer may include at least one opening under at least one of side surfaces of the semiconductor chip. The second insulation layer may be on a lower surface of each of the first conductive patterns. Thus, a gas generated from the DAF may be readily discharged through the opening. A spreading of a crack, which may be generated at the interface between the side surface of the semiconductor chip and the molding member, toward the conductive patterns of the package substrate may be limited and/or suppressed. Adhesion between the semiconductor chip and the molding member may be reinforced.