Package Substrate With Embedded And Protruded Circuit Patterns
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current semiconductor package manufacturing methods require finer pitches and higher densities due to increased IC chips, leading to complex and costly processes for installing flip chips and wire bonding chips, with existing methods involving additional seed layers and plating lead-in wires for electroplating.
Innovation Solution
A package substrate and manufacturing method that embeds first circuit patterns in an insulating layer with protruded patterns above, allowing for simultaneous installation of flip chips and wire bonding chips without an additional seed layer for electroplating, simplifying processes and reducing costs by using a seed layer on the embedded circuit patterns for surface treatment.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If an additional seed layer is formed for electroplating to enable surface treatment, then surface treatment can be performed, but the manufacturing process becomes more complex and costly
Solution Approach 1:
The existing seed layer formed during circuit pattern fabrication is made to serve dual purposes: both as the foundation for circuit patterns and as the seed layer for electroplating surface treatment. This eliminates the need for a separate additional seed layer, reducing manufacturing complexity while maintaining surface treatment capability.
2Productivity
If finer pitches are used to increase IC chip density, then more input/output connection terminals can be installed, but the manufacturing process becomes more difficult and costly
Solution Approach 1:
The circuit patterns are formed with embedded structures in advance, creating protruded portions that naturally serve as alignment references for subsequent IC chip mounting. This preliminary structuring simplifies the mounting process for fine-pitch configurations, making high-density packages more manufacturable.
3Adaptability or versatility
If both flip chip and wire bonding chip installation are supported, then hybrid bonding is enabled, but the surface structure becomes more complex
Solution Approach 1:
The insulating layer is designed with locally differentiated properties: some regions have embedded circuit patterns with protruded portions for wire bonding, while other regions have flat surfaces for flip chip mounting. This local variation in surface quality enables support for both chip installation methods without requiring overall structural complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables the formation of fine circuit patterns with reduced manufacturing complexity and costs, allowing for the simultaneous installation of flip chips and wire bonding chips on a surface with both embedded and protruded circuit structures, improving manufacturing efficiency and cost-effectiveness.
Implementation Method 1
without forming an additional seed layer for electroplating
Data Source
AI summary
Package substrate and a method of manufacturing the same is disclosed. The package substrate includes an insulating layer having first circuit patterns embedded in a first surface of the insulating layer, and a protruded circuit pattern formed above at least one of the embedded first circuit patterns, wherein a width of the protruded circuit pattern is greater than a width of each of the embedded first circuit patterns. Accordingly, a flip chip and a wire bonding chip may be installed at the same time owing to an embedded structure of circuit pattern and a protruded structure of circuit pattern realized together on a surface where an electronic component is to be installed. Moreover, a fine circuit pattern may be formed, and a surface treatment layer may be selectively formed at desired portions without forming an additional seed layer for electroplating, thereby possibly simplifying manufacturing processes and saving manufacturing costs.