Package Substrate Conductive Unit Vertical Stacking
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Solution Overview
Problem
In high-density integrated circuit package substrates, it is challenging to thicken fine-pitch circuit wires for increased electrical conductivity without compromising fabrication yield and product reliability.
Innovation Solution
A package substrate design featuring a first conductive unit with a height greater than the thickness of the dielectric material layer, and a method involving multiple dielectric and conductive layers with specific cross-sectional relationships to enhance wire thickness and conductivity, using materials like Cu, Ni, and Au, and employing electroplating and layer stacking techniques.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If wire thickness is increased to improve electrical conductivity, then electrical conductivity is improved, but fabrication yield and product reliability deteriorate
Solution Approach 1:
The patent transitions from planar wire thickening to vertical stacking of conductive units. Instead of increasing wire thickness in the lateral plane (which compromises fine-pitch fabrication), the invention stacks multiple conductive units vertically to increase the effective cross-sectional area and electrical conductivity while preserving the original fine-pitch lateral dimensions.
Solution Approach 2:
The patent embeds multiple conductive units within a hierarchical structure where conductive units are nested within dielectric layers, which are in turn nested within package substrate layers. This nested arrangement allows multiple conductive paths to coexist in a compact vertical space, effectively increasing conductivity without expanding lateral footprint or compromising fabrication precision.
2Area of moving object
If fine-pitch circuit wires are used to achieve high-density design, then circuit density is improved, but wire thickness is limited
Solution Approach 1:
The patent resolves the density-thickness tradeoff by exploiting the vertical dimension. Fine-pitch lateral dimensions maintain high circuit density, while vertical stacking of multiple conductive units increases effective wire thickness and conductivity. This separates the conflicting requirements into different spatial dimensions.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively increases the cross-sectional area of metal wires, improving electrical conductivity while maintaining high fabrication yield and reliability, suitable for high-power electronic applications.
Implementation Method 1
employing electroplating and layer stacking techniques
Data Source
AI summary
This disclosure provides a package substrate and its fabrication method. The package substrate comprises: a first dielectric material layer have an opening; a first conductive unit including a first part in the opening of the first dielectric material layer and a second part on the first dielectric material layer; and a second dielectric material layer covering the first conductive unit and the first dielectric material layer; wherein a height of the first conductive unit is larger than a thickness of the first dielectric material layer; wherein a cross-section of the second part is larger than that of the first part in the first conductive unit.