Semiconductor Package Substrate Layout for Die Corner Crack Resistance

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Solution Overview

Problem

Existing semiconductor package structures face reliability issues due to stress concentration and subsequent crack formation in conductive lines during thermal processes, particularly at the die corner areas where there is a mismatch in thermal expansion coefficients between the package substrate and semiconductor die.

Innovation Solution

The implementation of non-linear or curved conductive lines at predetermined die corner areas within the die shadow to disperse stress, reducing the risk of line cracks by avoiding stress concentration at the intersections of line segments with different widths.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional linear conductive lines are used in package substrate, then manufacturing is simple, but stress concentration occurs at intersections leading to line cracks during thermal processes

Engineering Contradiction:
Improveconductive line crack resistanceVSAvoidconductive line pattern complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies curvature to conductive lines by replacing linear segments with curved or arc-shaped lines at die corner areas. This curvature design disperses thermal stress concentration that would otherwise occur at sharp intersections of linear lines, preventing crack formation while maintaining electrical connectivity. The curved geometry inherently reduces stress concentration points.

Inventive Principle:
Principle #14Spheroidality (Curvature)

Solution Approach 2:

The patent implements local quality by applying non-linear curved line patterns specifically at die corner areas where stress concentration is most severe, while other areas may retain conventional linear patterns. This targeted approach addresses the specific problem location without unnecessarily complicating the entire conductive line network, balancing reliability improvement with manufacturing simplicity.

Inventive Principle:
Principle #3Local quality

2Reliability

If conductive lines are routed through die corner areas, then connectivity is achieved, but thermal expansion mismatch causes stress concentration and line cracks

Engineering Contradiction:
Improveconductive line integrityVSAvoidthermal stress concentration
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

Curved conductive lines are used in die corner areas to dispers thermal stress concentration caused by thermal expansion mismatch between package substrate and die. The curved geometry distributes stress along a longer path rather than concentrating it at sharp corners, preventing line cracks during thermal cycling.

Inventive Principle:
Principle #14Spheroidality (Curvature)

Solution Approach 2:

The patent changes the geometric parameter of conductive lines from linear to curved/non-linear patterns in specific high-stress areas. This parameter change modifies the stress distribution characteristics, reducing peak stress concentrations that lead to crack formation during thermal processes.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design enhances the reliability of semiconductor die packages by effectively reducing the occurrence of cracks in conductive lines after thermal processes, thereby improving the overall package reliability.

Implementation Method 1

The second line segment is non-linear and has a varying extension direction to disperse stress and avoid stress concentration at the intersection of line segments with different line widths

Methodology Applied
Scientific EffectStress dispersion:

Data Source

PatentUS11854956B2Semiconductor die package with conductive line crack prevention design
Publication Date: 2023.12.26 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US11854956B2 patent drawing
  • US11854956B2 patent drawing
  • US11854956B2 patent drawing

AI summary

A semiconductor die package is provided. The semiconductor die package includes a semiconductor die and a package substrate disposed below the semiconductor die. The semiconductor die has a corner. The package substrate includes several conductive lines, and one of the conductive lines under the corner of the semiconductor die includes a first line segment and a second line segment. The first and second line segments are connected together, and the second line segment has a smaller line width than the first line segment. The first line segment is linear and extends in a first direction. The second line segment is non-linear and has a varying extension direction.