Package Substrate Surface Treatment for Fine Trace Spacing

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Solution Overview

Problem

Conventional package substrates face issues with reduced line spacing due to metal layers on side surfaces, leading to potential short circuits and difficulties in achieving high-density contacts, as the metal layers occupy space and cause wire bonding shifts.

Innovation Solution

A package substrate design where the surface treatment layer is not formed on the side surfaces of the circuit layer, maintaining the original line spacing and allowing for flexible wiring without short circuits, while enabling fine line spacing and high-density contact designs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a metal layer is formed on the side surface of conductive traces to enhance conductivity and protection, then the reliability of the circuit structure is improved, but the line spacing between adjacent traces is reduced, causing short circuits and making fine spacing development difficult

Engineering Contradiction:
Improveconductivity and protection of conductive tracesVSAvoidline spacing between adjacent traces
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent extracts the metal layer from the side surface of the conductive trace, keeping it only on the top surface. This removes the harmful occupation of lateral space by the metal layer while preserving the electrical connectivity function, thereby preventing short circuits between adjacent traces while maintaining enhanced conductivity where needed.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent transitions the metal layer from a three-dimensional side-surface configuration to a two-dimensional top-surface configuration. By confining the metal layer to the top surface only, the design maintains the functional benefits of metal enhancement (conductivity and protection) while eliminating the spatial intrusion into the line spacing between adjacent traces.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If the distance between conductive traces is increased to avoid short circuits, then the reliability of wiring is improved, but the density of contacts on the package substrate is reduced, making it impossible to meet high-density requirements

Engineering Contradiction:
Improvewiring reliabilityVSAvoiddensity of contacts
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patent removes the metal layer from the side surfaces of conductive traces, eliminating the source of space occupation that forced increased trace spacing. This extraction allows traces to be positioned closer together according to original design specifications, thereby achieving both wiring reliability and high contact density simultaneously.

Inventive Principle:
Principle #2Taking out (Extraction)

3Strength

If the metal layer occupies space between conductive traces, then the surface shape presents a circular arc that may provide structural integrity, but the wire bonding contacts are easily shifted, resulting in poor bonding quality

Engineering Contradiction:
Improvestructural integrity of substrateVSAvoidwire bonding contact alignment
Core Design Contradiction:
StrengthVSManufacturing precision

Solution Approach 1:

The patent extracts the metal layer from the side surfaces where it interferes with wire bonding operations. By removing the metal layer from these lateral positions, the wire bonding tools can accurately position and bond to the conductive traces without obstruction or shifting caused by the circular arc surface profile, while structural integrity is maintained through alternative design considerations.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS20230290744A1Electronic package, package substrate and manufacturing method thereof
Publication Date: 2023.09.14 AALTOSEMI INC
  • US20230290744A1 patent drawing
  • US20230290744A1 patent drawing
  • US20230290744A1 patent drawing

AI summary

An electronic package is provided, including a package substrate in which a circuit layer and a surface treatment layer are embedded in an insulating portion, and the surface treatment layer is coupled to a top surface of the circuit layer, but is not formed on a side surface of the circuit layer. Therefore, the circuit layer can maintain the original predetermined line spacing so that it is beneficial to be designed with fine line spacing/line width.