Package Substrate Grooves for Semiconductor Mounting Area
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional semiconductor packages face challenges in maximizing the effective mounting area without increasing the package size, particularly as semiconductor chips become smaller and more compact.
Innovation Solution
The design incorporates a package substrate with grooves on its lower surface, allowing mounting elements to be inserted into these grooves, thereby increasing the effective mounting area without enlarging the board size, and includes external terminals on the lower surface for electrical connectivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If the package substrate uses a conventional rectangular shape with uniform thickness, then the manufacturing process is simple, but the effective mounting area cannot be maximized
Solution Approach 1:
The patent introduces grooves at different depths on the package substrate surface, transforming a two-dimensional flat mounting area into a three-dimensional structured surface. This allows mounting elements to be positioned at multiple height levels, effectively increasing the usable mounting area without expanding the substrate's footprint dimensions.
Solution Approach 2:
The substrate surface is segmented into multiple regions with different groove depths, creating distinct mounting zones. This segmentation allows different types of mounting elements to be placed in different depth regions, optimizing space utilization and increasing the effective mounting area while maintaining a compact form factor.
2Area of stationary object
If the package size is reduced to achieve small form factors, then the portability improves, but the effective mounting area decreases
Solution Approach 1:
By creating grooves at varying depths on the substrate surface, the patent utilizes the third dimension (depth) to increase the effective mounting area. This allows the package to maintain a small footprint while providing sufficient mounting space for multiple elements through vertical stratification of mounting zones.
Solution Approach 2:
The patent employs nested grooves where shallower grooves contain deeper grooves within the same substrate area. This nesting arrangement allows multiple mounting elements to be positioned in a hierarchical manner, maximizing the use of available space and increasing the effective mounting area without enlarging the package dimensions.
3Area of moving object
If mounting elements are densely arranged to increase effective mounting area, then the space utilization improves, but the electrical connectivity becomes more complex
Solution Approach 1:
The substrate is segmented into multiple mounting regions with different groove depths, allowing mounting elements to be organized in distinct zones. This segmentation facilitates systematic electrical connectivity design by grouping related elements together, reducing the complexity of interconnections while maintaining high space utilization.
Data Source
AI summary
Provided is a package substrate and a semiconductor package. The package substrate includes a main body having an upper surface and a lower surface opposite to the upper surface, a plurality of external terminals attached to the lower surface, and a plurality of grooves formed in regions of the lower surface to which the plurality of external terminals is not attached. The semiconductor package includes a package substrate, a semiconductor chip mounted on the upper surface of the semiconductor substrate, and a board providing a region mounted with the package substrate and being mounted with a plurality of mounting elements which are vertically aligned with the plurality of grooves and are inserted into the plurality of grooves.