Semiconductor Package Substrate Layout for Low-Inductance Heat Dissipation
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Solution Overview
Problem
Existing semiconductor package substrates suffer from rapid deterioration in electrical and thermal characteristics, making them unsuitable for structures requiring fast response and superior heat dissipation.
Innovation Solution
A method involving the formation of trenches and posts on a conductive base substrate, filling with resin, and creating conductive layers for circuit wiring on both surfaces, with the conductive layers formed by sputtering and electroplating methods, and including a surface treatment to enhance adhesion, allowing for integrated upper and lower circuit wiring with reduced inductance and improved heat dissipation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a through hole is formed by using a copper clad laminate (CCL) stacked with a copper foil and an inner surface of the through hole is plated, then electrical connection between upper and lower copper foils is achieved, but electrical and thermal characteristics deteriorate rapidly
Solution Approach 1:
The invention extracts the copper foil from the traditional CCL structure and replaces it with a metal core substrate. This fundamental extraction of the problematic element (copper foil in CCL) and replacement with a superior alternative (metal core) resolves the contradiction by achieving better electrical and thermal characteristics without the rapid deterioration seen in conventional structures.
Solution Approach 2:
The invention changes the fundamental parameter of the substrate material from copper-clad laminate to metal core substrate. This parameter change transforms the electrical and thermal conductivity characteristics, enabling fast response and superior heat dissipation while maintaining structural integrity and electrical connection capabilities.
2Productivity
If fine circuit patterns with narrow line width and high complexity are used, then performance and density of semiconductor devices increase, but manufacturing precision requirements increase
Solution Approach 1:
The invention uses a composite structure combining metal core substrate with resin filling in trenches. This composite material approach provides a stable foundation that supports fine circuit patterns with narrow line widths. The metal core offers excellent thermal and electrical properties while the resin provides mechanical support and insulation, together enabling high-density circuits with precise manufacturing.
3Ease of manufacture
If conventional copper clad laminate structure is used, then ease of manufacture is maintained, but heat dissipation characteristics are insufficient
Solution Approach 1:
The invention changes the thermal conductivity parameter by replacing the CCL structure with a metal core substrate. This parameter change dramatically improves heat dissipation characteristics while the manufacturing process remains relatively straightforward, involving trench formation, resin filling, and conductive layer deposition on the metal core surface.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method enables semiconductor package substrates with enhanced electrical conductivity, reduced inductance, and superior heat dissipation characteristics, suitable for complex circuit designs and high-performance applications.
Implementation Method 1
The first conductive layer may be formed by a sputtering method
Implementation Method 2
The first conductive layer may be formed by a sputtering method and the second conductive layer may be formed by an electroplating method
Data Source
AI summary
A method of manufacturing a semiconductor package substrate includes forming a trench and a post by etching an upper surface of a base substrate including a conductive material, filling the trench with a resin, removing the resin exposed to outside of the trench such that an upper surface of the post and an upper surface of the resin are at same level, forming a conductive layer on an entire area of the upper surface of the post and the upper surface of the resin, and forming a circuit wiring including an upper circuit wiring and a lower circuit wiring by simultaneously patterning the conductive layer and a lower surface of the base substrate.