Package Substrate Embedded Noise Shielding Walls

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

As semiconductor package technology advances, compact signal lines experience significant cross-talk noise due to the lack of noise shielding mechanisms in conventional chip packages.

Innovation Solution

The integration of noise shielding walls, where at least one signal line is sandwiched between two shielding walls, which are electrically coupled to ground, is implemented using a process involving etching and metal filling in dielectric layers to form trenches and subsequently filling them with metal to create the shielding walls and signal lines.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If signal lines are made compact to increase integration density, then productivity and area utilization are improved, but cross-talk noise increases due to lack of shielding

Engineering Contradiction:
Improveintegration densityVSAvoidcross-talk noise
Core Design Contradiction:
ProductivityVSObject-affected harmful factors

Solution Approach 1:

Grounded shielding walls are introduced as intermediary structures between adjacent signal lines. These shielding walls act as mediators that intercept and redirect electromagnetic fields to ground, preventing direct coupling between signal lines and thereby reducing cross-talk noise while allowing compact signal line spacing

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The shielding structure extends vertically into the substrate, utilizing the third dimension (depth) to provide noise isolation. By etching trenches to a specific depth and filling them with conductive material, the shielding effect is achieved without increasing the lateral footprint, thus maintaining high integration density while adding noise protection

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If shielding walls are added to reduce cross-talk noise, then reliability is improved, but device complexity and manufacturing steps increase

Engineering Contradiction:
Improvesignal integrityVSAvoidstructure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The formation of shielding walls is merged with existing signal line fabrication steps. Both signal lines and shielding walls are created using the same etching and metal filling processes, allowing simultaneous formation of multiple conductive structures in a single fabrication sequence, thereby reducing overall process complexity

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The shielding structure is segmented into discrete walls positioned at specific locations between signal lines, rather than implementing a continuous ground plane. This segmentation allows selective shielding where cross-talk is most problematic, reducing the total amount of conductive material and structural complexity while maintaining signal integrity

Inventive Principle:
Principle #1Segmentation

3Reliability

If shielding walls are added to reduce cross-talk noise, then reliability is improved, but manufacturing precision requirements increase

Engineering Contradiction:
Improvesignal integrityVSAvoidtrench etching precision
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The positions of shielding walls are predetermined during the pattern design phase, with trenches etched at specific locations between signal lines. This preliminary positioning allows the use of standard photolithography and etching processes with conventional precision requirements, as the shielding wall locations are established before metal filling and grounding connections are made

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS10290586B2Package substrate with embedded noise shielding walls
Publication Date: 2019.05.14 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US10290586B2 patent drawing
  • US10290586B2 patent drawing
  • US10290586B2 patent drawing

AI summary

A package substrate with embedded noise shielding walls is disclosed. One of the embodiment comprises a signal line S sandwiched by a left shielding wall W1 and a right shielding wall W2. The signal line S, left shielding wall W1, and the right shielding wall W2 are embedded in a dielectric layer.