Package Substrate Vias With Non-Circular Layouts for RF and Power Delivery

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Solution Overview

Problem

Conventional integrated circuit (IC) package substrates are limited by circular conductive vias that are difficult to miniaturize and are constrained by drilling techniques, limiting their performance in digital, radio frequency (RF), and power delivery applications.

Innovation Solution

The use of patterned vias with non-circular shapes, formed through lithographic techniques, which allow for more efficient and accurate interconnect structures, passive devices, and improved performance by reducing losses and enhancing broadband and high-frequency performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If circular conductive vias are used in IC package substrates, then manufacturing simplicity is maintained, but miniaturization capability and performance are limited

Engineering Contradiction:
Improvevia formation precisionVSAvoidvia size
Core Design Contradiction:
Manufacturing precisionVSLength of moving object

Solution Approach 1:

The patent applies asymmetry by transitioning from symmetric circular via holes to asymmetric patterned vias with rectangular, square, or other non-circular footprints. This shape change enables better space utilization and miniaturization while maintaining manufacturing feasibility through lithographic patterning processes.

Inventive Principle:
Principle #4Asymmetry

Solution Approach 2:

The patent changes the geometric parameters of vias from circular to non-circular shapes, allowing optimization of via dimensions for specific applications. This parameter change enables reduced via size and improved interconnect density while maintaining electrical performance through controlled impedance design.

Inventive Principle:
Principle #35Parameter changes

2Ease of manufacture

If conventional drilling techniques are used for via formation, then process simplicity is maintained, but interconnect performance and broadband capability are limited

Engineering Contradiction:
Improvevia formation easeVSAvoidinterconnect performance
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent replaces mechanical drilling techniques with lithographic patterning methods for via formation. This substitution enables precise control of via geometry, dimensions, and positioning, resulting in improved interconnect performance, reduced losses, and enhanced broadband and high-frequency capabilities while maintaining manufacturing feasibility.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Device complexity

If circular vias are used, then manufacturing simplicity is maintained, but digital, RF, and power delivery performance are limited

Engineering Contradiction:
Improveinterconnect structure complexityVSAvoidpower delivery capability
Core Design Contradiction:
Device complexityVSPower

Solution Approach 1:

The patent changes the geometric parameters of vias from circular to non-circular shapes, allowing optimization of via dimensions for specific applications. This parameter change enables reduced via size and improved interconnect density while maintaining electrical performance through controlled impedance design.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent applies asymmetry by transitioning from symmetric circular via holes to asymmetric patterned vias with rectangular, square, or other non-circular footprints. This shape change enables better space utilization and miniaturization while maintaining manufacturing feasibility through lithographic patterning processes.

Inventive Principle:
Principle #4Asymmetry

Data Source

PatentUS11804426B2Integrated circuit structures in package substrates
Publication Date: 2023.10.31 SK HYNIX NAND PRODUCT SOLUTIONS CORP
  • US11804426B2 patent drawing
  • US11804426B2 patent drawing
  • US11804426B2 patent drawing

AI summary

Disclosed herein are integrated circuit (IC) structures that may be included in package substrates. For example, disclosed herein are passive components in package substrate, wherein the passive components include at least one non-circular via and at least one pad in contact with the at least one non-circular via, and the passive components include an inductor or a capacitor. Other embodiments are also disclosed.