Package Substrate Skip Via Design for Signal Uniformity
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing package substrates face challenges in ensuring uniform signal transmission speeds between electronic components due to variations in wiring line widths and thicknesses, leading to potential processing delays and reduced reliability.
Innovation Solution
A package substrate design featuring multiple interlayer resin insulating layers, dedicated wiring layers, and skip via conductors that connect the outermost and second conductor layers, with the dedicated wiring layer's area on the inner-layer interlayer resin insulating layer ranging from 3% to 15%, optimizing signal transmission and reducing warpage risks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If wiring layers are used to connect multiple LSIs on a substrate, then electrical connection between components is achieved, but variations in wiring line widths and thicknesses cause non-uniform signal transmission speeds
Solution Approach 1:
The patent segments the signal transmission path by introducing multiple dedicated wiring layers (first conductor layer, second conductor layer) with specific functions. The first conductor layer is dedicated to signal transmission between via conductors, while the second conductor layer handles other functions, thereby isolating and controlling signal path variations to ensure uniform transmission speeds.
Solution Approach 2:
The patent applies local quality by creating a specific conductor layer configuration where the first conductor layer has controlled thickness and width parameters optimized for signal transmission. The via conductors are positioned to connect specifically to this optimized layer, ensuring that the critical signal path has uniform electrical characteristics while other parts of the substrate can have different properties.
2Reliability
If multiple conductor layers and via conductors are used to connect electronic components, then connection reliability is improved, but the complexity of the substrate structure increases
Solution Approach 1:
The patent achieves universality by designing the first conductor layer to serve multiple purposes: it provides signal transmission pathways, serves as a reference plane for via conductor positioning, and maintains uniform thickness to ensure consistent electrical characteristics. This multi-functional design reduces the need for additional specialized layers, thereby managing complexity while improving reliability.
Solution Approach 2:
The patent resolves complexity by organizing conductor layers in a systematic vertical stack with defined relationships. The first conductor layer is positioned between the outermost and inner-layer insulating layers, with via conductors extending through the outermost layer to connect to it. This dimensional organization creates a modular structure that is easier to manufacture and control despite the multiple layers involved.
3Reliability
If the first conductor layer area is increased to improve signal transmission, then more via conductors can be connected, but warpage of the substrate may occur
Solution Approach 1:
The patent applies parameter changes by precisely controlling the area ratio of the first conductor layer to be between 3% and 15% of the inner-layer interlayer resin insulating layer area. This optimized parameter range ensures sufficient space for via conductor connections and signal transmission while maintaining substrate flatness and preventing warpage during manufacturing and operation.
Data Source
AI summary
A package substrate includes interlayer insulating layers including outermost and inner-layer layers, conductor layers including an outermost layer, a first layer between the outermost and inner-layer layers, and a second layer on which the inner-layer layer is formed, via conductors including first and second conductors through the outermost insulating layer, and skip via conductors through the outermost and inner-layer insulating layers to connect the outermost and second conductor layers. The outermost conductor layer includes first and second pads to mount first and second electronic components on the outermost insulating layer, the first conductors are positioned to connect the first conductor layer and first pads, the second conductors are positioned to connect the first conductor layer and second pads, and the first conductor layer has area on surface of the inner-layer insulating layer which is in range of 3 to 15% of area of the surface of the inner-layer insulating layer.