Package Substrate Stacked Via Design for Signal Uniformity
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Solution Overview
Problem
Existing package substrates face challenges in achieving uniform signal transmission speeds between electronic components due to variations in signal line widths and thicknesses, leading to potential signal processing delays and reduced functionality.
Innovation Solution
A package substrate design featuring a dedicated wiring layer sandwiched between insulating resin interlayers, with via conductors forming stacked via structures to connect pads and conductive circuits, ensuring consistent transmission speeds and enhanced connection reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple wiring layers are patterned on different insulation layers to connect LSIs, then connection functionality is achieved, but signal transmission speed uniformity deteriorates due to variations in signal line widths and thicknesses
Solution Approach 1:
The patent merges the signal transmission function into a single dedicated wiring layer, eliminating the need for multiple patterned wiring layers on different insulation layers. This consolidation ensures uniform signal line characteristics (width and thickness) across all connections, achieving uniform signal transmission speeds while reducing structural complexity.
Solution Approach 2:
The patent creates a specialized local structure by forming a dedicated wiring layer with controlled signal line characteristics between the insulating resin interlayers. This local quality enhancement ensures consistent signal transmission properties specifically for the signal paths, while other layers handle different functions.
2Reliability
If via conductors are formed to connect different wiring layers, then connection reliability improves, but substrate warping increases
Solution Approach 1:
The patent segments the via conductor structure into stacked via conductors formed in separate insulating resin interlayers. This segmentation allows each via conductor to be independently controlled and positioned, improving connection reliability while distributing the structural impact to minimize substrate warping.
Solution Approach 2:
The insulating resin interlayers act as intermediaries between the via conductors and the substrate. These intermediary layers provide mechanical support and stress distribution, enabling reliable via conductor connections while preventing substrate warping through controlled stress management.
3Reliability
If signal line width and thickness variations are reduced for uniform transmission, then manufacturing precision requirements increase
Solution Approach 1:
The patent performs preliminary action by forming the dedicated wiring layer and signal lines between the insulating resin interlayers before final assembly. This preliminary structuring allows precise control of signal line width and thickness during the manufacturing process, ensuring uniform transmission characteristics while managing precision requirements through controlled fabrication sequencing.
Data Source
AI summary
A package substrate includes an outermost interlayer, an outermost conductive layer including first pads positioned to mount at electronic component and second pads positioned to mount another electronic component, a first conductive layer including first circuits and formed such that the outermost interlayer is on the first conductive layer and that the first circuits are connecting the first and second pads, an inner interlayer formed such that the first conductive layer is on the inner interlayer, a second conductive layer formed such that the inner interlayer is on the second conductive layer, via conductors penetrating through the outermost interlayer and including first via conductors connecting the first conductive layer and the first pads and second via conductors connecting the first conductive layer and the second pads, and third via conductors penetrating through the inner interlayer and positioned such that the first and third via conductors form stacked via conductors.