Package-Integrated Thermoelectric Cooler for Stacked Chip Hotspots
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Solution Overview
Problem
Traditional semiconductor package cooling methods are inadequate for high-density stacking, leading to unacceptably high internal temperatures due to passive heat dissipation limitations.
Innovation Solution
Implementation of a thermoelectric cooler (TEC) within the package structure to actively remove heat from internal hotspots using a temperature-regulated Peltier effect, with P-type and N-type doped regions connected by traces and powered by an electrical source, enhancing heat dissipation through temperature gradients.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Temperature
If passive heat dissipation methods are used in traditional semiconductor packages, then the package structure is simple and manufacturing is easier, but internal temperatures become unacceptably high due to high power density
Solution Approach 1:
The patent changes the thermal management approach from passive heat dissipation to active thermoelectric cooling by applying electrical parameters (voltage across P-type and N-type doped regions) to create temperature gradients and actively pump heat away from hotspots, thereby resolving the temperature issue without relying solely on passive structural changes
Solution Approach 2:
The patent employs composite material structure with P-type and N-type doped regions in direct contact, forming a thermoelectric composite that converts electrical energy to thermal pumping action, enabling active heat removal while maintaining a relatively compact package structure
2Productivity
If high-density stacking is implemented to increase functionality, then device capability is improved, but thermal management becomes more difficult and internal hotspots increase
Solution Approach 1:
The patent applies local thermoelectric cooling specifically at hotspot locations within the high-density stacked package, using P-type and N-type doped regions positioned to address thermal issues at critical locations rather than requiring uniform cooling throughout the entire package structure
Solution Approach 2:
The patent uses electrical parameter control (applying voltage to thermoelectric elements) to dynamically manage heat removal in high-density stacks, enabling active thermal regulation that adapts to the increased power density from additional functional layers
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The TEC effectively reduces internal hotspot temperatures, improving semiconductor package performance and reliability by actively managing heat, thus optimizing thermal management in high-density semiconductor packages.
Implementation Method 1
a temperature gradient across a first side and a second side of the thermoelectric cooler opposite to each other when voltage is applied across a plurality of P-type doped regions and a plurality of N-type doped regions connected to each other in series
Data Source
AI summary
Provided is a package structure including a first redistribution layer (RDL) structure, a die, a circuit substrate, and a first thermoelectric cooler. The RDL) structure has a first side and a second side opposite to each other. The die is disposed on the first side of the first RDL structure. The circuit substrate is bonded to the second side of the first RDL structure through a plurality of first conductive connectors. The first thermoelectric cooler is between the first RDL structure and the circuit substrate, wherein the first thermoelectric cooler includes at least a N-type doped region and at least a P-type doped region.