Electronic Component Package Stress Distribution via Terminal Area
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Solution Overview
Problem
Conventional electronic component packages experience reliability issues due to high stress at the connection parts between the main substrate and the frame body, particularly when miniaturized and with increased component size or number of external terminals, leading to potential package failure.
Innovation Solution
The electronic component package design includes larger area and longer connection terminals and external terminals strategically positioned to alleviate stress, with resin filling between the substrate and frame body, and a dummy terminal connected to the ground to enhance reliability and distribute force effectively.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the electronic component package is miniaturized and the number of external terminals is increased, then the performance and integration density are improved, but the stress on the connection part between the main substrate and the frame body becomes high
Solution Approach 1:
The patent applies local quality by making the second connection terminal have a larger area than the first connection terminal. Specifically, the second connection terminal's area is increased to distribute stress more effectively at the critical location facing the semiconductor chip, while other connection terminals maintain their original sizes. This localized modification addresses the stress concentration problem without requiring a complete redesign of all connection terminals, thus maintaining integration density while reducing stress.
Solution Approach 2:
The patent changes the parameter of connection terminal area at specific locations. The second connection terminal is designed with a larger area parameter compared to the first connection terminal, which directly addresses the stress distribution issue. This parameter change allows the package to handle higher stress loads while maintaining the miniaturized form factor and high integration density.
2Reliability
If the size of the mounted electronic component increases, then the performance is improved, but the stress on the connection part becomes high
Solution Approach 1:
The patent applies local quality by concentrating the stress relief design at the second connection terminal location, which faces the semiconductor chip. This terminal is given a larger area specifically at the position where stress concentration occurs, while other parts of the package structure remain unchanged. This targeted approach allows larger electronic components to be mounted with improved performance while managing stress at the critical connection point.
3Reliability
If resin is filled between the main substrate and the frame body, then the stress distribution is improved and reliability is enhanced, but the manufacturing complexity increases
Solution Approach 1:
The patent uses resin as an intermediary material filled between the main substrate and the frame body. This resin layer acts as a stress-distributing medium that reduces stress concentration at the connection parts. While this adds a manufacturing step, the resin filling process integrates well with existing package manufacturing workflows, and the significant improvement in stress distribution and reliability justifies the moderate increase in manufacturing complexity.
Data Source
AI summary
Provided is an electronic component package that does not lower reliability while enabling miniaturization and high performance of the electronic component package. The electronic component package includes a main substrate, a first electronic component provided on a main surface of the main substrate, a frame body disposed so as to face the main surface of the main substrate, and a first connection terminal and a second connection terminal disposed on the main surface of the main substrate along a first side of the frame body. The second connection terminal is disposed on the first side of the frame body at a position facing a vicinity of a midpoint of a side of the first electronic component, and the second connection terminal has an area larger than an area of the first connection terminal.