3D Package Structure With Dielectric-Isolated Through Via

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Solution Overview

Problem

Current semiconductor packaging technologies face challenges in achieving compact and efficient integration of electronic components due to limitations in feature size reduction and packaging density, particularly in forming reliable connections and avoiding delamination issues in 3D packaging structures.

Innovation Solution

The method involves forming a through integrated fan-out via (TIV) structure with a conductive post and seed layer, which penetrates through a redistribution line (RDL) structure and is laterally separated by a dielectric layer, allowing for electrical contact and avoiding delamination, while also using a carrier with a release layer and multiple dielectric and metal layers to create a compact package structure.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If feature size is reduced to increase integration density, then more components can be integrated into a given area, but manufacturing precision and reliability of connections deteriorate

Engineering Contradiction:

Improveintegration densityVSAvoidconnection reliability

Core Design Contradiction:

Quantity of substanceVSManufacturing precision

Solution Approach 1:

The patent transitions from planar 2D packaging to three-dimensional 3D packaging structures, utilizing vertical stacking and multi-layer configurations to achieve higher integration density without proportionally reducing feature sizes, thereby maintaining connection reliability

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent implements nested structures where multiple functional layers (conductive layers, dielectric layers, encapsulants) are stacked vertically with each layer containing multiple components, enabling dense integration while preserving individual component integrity and connection reliability

Inventive Principle:

Principle #7Nested doll (Nesting)

2Volume of moving object

If 3D packaging structures are formed to increase density, then packaging compactness is improved, but delamination issues and connection reliability worsen

Engineering Contradiction:

Improvepackaging compactnessVSAvoidconnection reliability

Core Design Contradiction:

Volume of moving objectVSReliability

Solution Approach 1:

The patent forms conductive posts and seed layers in advance before final encapsulation, ensuring proper electrical pathways are established and secured before the encapsulant is applied, preventing delamination and connection failures in the 3D structure

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent introduces dielectric layers and encapsulants as intermediary materials between conductive elements to provide mechanical support, electrical insulation, and stress distribution, preventing direct contact that could cause delamination while maintaining connection integrity

Inventive Principle:

Principle #24Intermediary (Mediator)

Data Source

PatentUS20240363464A1Package structure

Publication Date: 2024.10.31 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

AI summary

A package structure is provided. The package structure includes a die, an encapsulant, a first redistribution line (RDL) structure, a second RDL structure, and a through via. The encapsulant laterally encapsulates the die. The first redistribution line (RDL) structure on a first side of the die and the encapsulant, wherein the first RDL structure comprises a dielectric layer and a redistribution layer in the dielectric layer. The second RDL structure is located on a second side of the die and the encapsulant. The through via extends through the encapsulant and the first redistribution line structure and connecting the second RDL structure. The through via is laterally separated from the redistribution layer by the dielectric layer therebetween.