Package Substrate Trace Layout for Low-Loss High-Speed Signaling

The patent applies local quality by creating non-uniform dielectric thickness distribution across the substrate. Specifically, thicker dielectric regions are positioned beneath high-speed signaling traces to reduce transmission losses, while thinner dielectric regions are used in areas where loss is less critical. This localized optimization allows the design to achieve low-loss performance where needed without incurring the full manufacturing complexity and risk associated with uniformly thick dielectric layers across the entire substrate.

The patent employs parameter changes by varying the dielectric thickness parameter across different regions of the substrate. By adjusting the dielectric thickness beneath signaling traces, the effective electrical length and characteristic impedance are modified, which compensates for the effects of longer physical routing lengths. This allows the design to maintain acceptable signal loss performance even when routing constraints require longer trace lengths, thereby preserving design flexibility without sacrificing signal integrity.

The patent applies segmentation by dividing the substrate into multiple regions with different dielectric thickness characteristics. Rather than attempting to achieve a complex continuous non-uniform thickness profile that would demand extremely high manufacturing precision, the design segments the substrate into discrete zones (e.g., thick dielectric regions beneath critical high-speed traces, thinner dielectric in less critical areas). This segmented approach reduces the insertion loss in critical paths while maintaining manufacturing precision requirements at achievable levels for each segment.