Semiconductor Package Trench Layout for Substrate Warpage Control

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Solution Overview

Problem

Semiconductor packages face challenges in achieving smaller size, reliability, performance, and capacity while managing substrate warpage due to internal stress, especially when multiple chips are integrated into a single package.

Innovation Solution

Incorporating a semiconductor package design with asymmetrical arrangement of semiconductor devices and trenches on a substrate, utilizing trenches and molding portions with specific materials to control warpage by increasing flexural rigidity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If multiple semiconductor chips are integrated into a single package substrate, then capacity and performance are improved, but substrate warpage occurs due to internal stress

Engineering Contradiction:
Improvenumber of semiconductor chipsVSAvoidsubstrate flatness
Core Design Contradiction:
Quantity of substanceVSStability of the object's composition

Solution Approach 1:

The substrate is segmented by forming trenches that divide it into multiple regions. These trenches create separate zones that can independently manage thermal expansion and stress, preventing overall substrate warpage while allowing multiple semiconductor chips to be mounted on different regions of the substrate.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the substrate are given different structural properties through the trench configuration. The trenches are strategically positioned to provide localized stress relief in areas where multiple chips create concentrated internal stress, while maintaining structural integrity in other regions.

Inventive Principle:
Principle #3Local quality

2Adaptability or versatility

If semiconductor devices are arranged asymmetrically on the substrate, then device integration flexibility is improved, but substrate warpage control becomes more difficult

Engineering Contradiction:
Improvedevice arrangement flexibilityVSAvoidsubstrate flatness
Core Design Contradiction:
Adaptability or versatilityVSStability of the object's composition

Solution Approach 1:

The trench structure is designed with asymmetric characteristics to match the asymmetric arrangement of semiconductor devices. The trenches are positioned and dimensioned to specifically address stress concentration patterns created by the asymmetric device layout, providing warpage control tailored to the specific arrangement while maintaining design flexibility.

Inventive Principle:
Principle #4Asymmetry

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The design effectively inhibits or prevents substrate warpage, enhancing reliability and performance by maintaining flatness and reducing flexural stress.

Implementation Method 1

a molding portion configured to fill an inner space of the upper trench and including a material having a coefficient of thermal expansion and a modulus of elasticity greater than a coefficient of thermal expansion and a modulus of elasticity of the substrate

Methodology Applied
Scientific EffectCoefficient of thermal expansion: Thermal Expansion

Implementation Method 2

a molding portion configured to fill an inner space of the upper trench and including a material having a coefficient of thermal expansion and a modulus of elasticity greater than a coefficient of thermal expansion and a modulus of elasticity of the substrate

Methodology Applied
Scientific EffectModulus of elasticity: Elasticity

Data Source

PatentUS20250349661A1Semiconductor package including a substrate having a trench
Publication Date: 2025.11.13 SAMSUNG ELECTRONICS CO LTD
  • US20250349661A1 patent drawing
  • US20250349661A1 patent drawing
  • US20250349661A1 patent drawing

AI summary

A semiconductor package includes a substrate, a first semiconductor device disposed on the substrate, a second semiconductor device disposed on the substrate and spaced apart from the first semiconductor device in a horizontal direction, an upper trench formed in an upper surface of the substrate at a side of the second semiconductor device, a lower trench formed in a lower surface of the substrate, and a molding portion disposed in the upper trench.