Semiconductor Package Structure With Underfill Interface Against Delamination
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Solution Overview
Problem
The semiconductor industry faces challenges in creating smaller and more efficient packaging techniques for semiconductor dies, particularly in advanced packaging technologies like Package-on-Package (POP) and Chip-On-Wafer-On-Substrate (CoWoS), where stress and delamination issues arise due to coefficient of thermal expansion (CTE) differences, leading to cracking and reduced packaging quality.
Innovation Solution
The use of buffer and interface materials at the corners of semiconductor substrates to mitigate stress and improve adhesion, reducing the likelihood of cracking and delamination by employing materials like die attach film (DAF) and polyimide (PI) to form a protective layer during the packaging process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If advanced packaging technologies like POP and CoWoS are used to achieve high integration and small footprint, then component density and functionality are improved, but stress and delamination issues arise due to CTE differences
Solution Approach 1:
The patent introduces an underfill material as an intermediary substance between the semiconductor die and the substrate. This underfill material has a coefficient of thermal expansion (CTE) that is intermediate between the die and substrate, serving as a stress buffer that mitigates the CTE mismatch. The underfill flows into the gaps between stacked dies and fills the void space, creating a mechanically coupled structure that reduces stress concentration and prevents delamination while maintaining the high-density POP and CoWoS packaging architecture.
2Volume of moving object
If smaller semiconductor packages are created to meet shrinking device demands, then device size is reduced, but stress concentration increases leading to cracking
Solution Approach 1:
The underfill material acts as a flexible cushioning layer that distributes mechanical stress throughout the package structure. This viscoelastic material can deform under stress and return to its original state, absorbing thermal expansion and contraction forces. The underfill's flexible nature allows it to accommodate dimensional changes in the small package components without causing cracking, thereby maintaining structural integrity despite the reduced package size.
3Adaptability or versatility
If multiple materials are used in packaging structure to improve functionality, then device capabilities are enhanced, but adhesion issues and delamination risk increase
Solution Approach 1:
The patent employs a composite material structure consisting of multiple layers including the semiconductor die, underfill material, substrate, and encapsulant. Each material is selected for its specific properties: the underfill provides stress relief and adhesion, the encapsulant provides environmental protection, and the substrate provides mechanical support. The interfaces between these materials are designed with appropriate surface treatments and transition layers to ensure strong bonding. This composite approach allows the integration of multiple functional materials while maintaining reliable adhesion through careful material selection and interface engineering.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed method enhances packaging quality by minimizing stress-induced cracking and delamination, ensuring reliable electrical connections and improved adhesion between materials, thereby maintaining structural integrity and functionality.
Implementation Method 1
stress and delamination issues arise due to coefficient of thermal expansion (CTE) differences
Implementation Method 2
employing materials like die attach film (DAF) and polyimide (PI) to form a protective layer during the packaging process
Data Source
AI summary
Embodiments of the present disclosure provide a package structure. The package structure includes a semiconductor die. An underfill material is below the semiconductor die and extends up to a sidewall of the semiconductor die. A molding compound surrounds the semiconductor die and the underfill material. An interface material is between the molding compound and the underfill material.