Electronic Package With Undulating Seam Reducing Thickness Variation

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Solution Overview

Problem

The variation in thickness of electronic device packages makes planarization difficult, leading to increased variations in interconnect thickness and potential electrical faults, such as open circuits, during the coupling of components like semiconductor dies with the package.

Innovation Solution

A package design with a first layer having a variable thickness and a second layer coupled to it, featuring a seam with an undulating profile, where the second layer's thickness compensates for the first layer's variations, reducing total thickness variation and facilitating planarization to improve coupling and manufacturing yields.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Shape

If planarization is performed on a package with thickness variations, then the surface can be flattened, but portions of interconnects may be over-removed or under-removed leading to electrical faults

Engineering Contradiction:
Improvesurface flatnessVSAvoidelectrical connection reliability
Core Design Contradiction:
ShapeVSReliability

Solution Approach 1:

The patent applies preliminary action by forming interconnects before the thickness variation occurs in the package structure. The interconnects are created in an earlier manufacturing stage when the substrate is still relatively uniform, ensuring that they are established before subsequent layers introduce thickness variations that would complicate planarization

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements beforehand cushioning by designing the package structure with compensating layers or features that anticipate and offset thickness variations. This allows the planarization process to remove material uniformly without over-removing or under-removing interconnect portions, as the structure is pre-configured to maintain interconnect exposure consistency

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

2Adaptability or versatility

If the package has variable thickness to accommodate different components, then design flexibility is improved, but planarization becomes difficult and manufacturing precision deteriorates

Engineering Contradiction:
Improvepackage design flexibilityVSAvoidplanarization precision
Core Design Contradiction:
Adaptability or versatilityVSManufacturing precision

Solution Approach 1:

The patent applies segmentation by dividing the package into multiple functional layers or regions with different thickness characteristics. This allows each segment to be optimized for its specific function while the overall structure maintains manufacturability through staged processing approaches

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements local quality by allowing different regions of the package to have different thickness properties tailored to local requirements. This enables variable thickness where needed for component accommodation while maintaining sufficient uniformity in other regions for precise planarization and interconnect formation

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS10910327B2Electronic device package with reduced thickness variation
Publication Date: 2021.02.02 SK HYNIX NAND PRODUCT SOLUTIONS CORP
  • US10910327B2 patent drawing
  • US10910327B2 patent drawing
  • US10910327B2 patent drawing

AI summary

A package for an electronic device may include a first layer. The first layer may include a first dielectric material. The first layer may have a planar first surface. The first layer may have a variable thickness. A second layer may be coupled to the first layer. The second layer may include a second dielectric material and may have a planar second surface. The second layer may have a variable thickness. A seam may be located at an interface between the first layer and the second layer, and the seam may have an undulating profile. The package may include at least one electrical trace, for example located in the first layer or the second layer.