Semiconductor Package Encapsulant Voids for Impedance Matching

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Solution Overview

Problem

In semiconductor device packaging, existing molding processes often cover all substrate regions with encapsulating material, which can hinder impedance matching in antenna-on-package implementations, as it is necessary to have regions devoid of encapsulating material for adjusting impedance through surface mount technology (SMT) passive components.

Innovation Solution

A semiconductor device package design that includes a carrier with non-symmetrical non-molding areas on both surfaces, where a sacrificial layer is used to create spaces within the encapsulant, allowing for regions devoid of encapsulating material, enabling adjustable impedance matching by exposing specific areas after the molding process.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If all substrate regions are covered by encapsulating material in the molding process, then the substrate and components are protected, but impedance matching cannot be adjusted in antenna-on-package implementations

Engineering Contradiction:
Improveprotection of substrate and componentsVSAvoidimpedance matching adjustment capability
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The encapsulating material is segmented to create a non-molding area that is devoid of encapsulant, separating the protected regions from the exposed region needed for impedance matching. This allows the substrate to have both covered and uncovered areas, enabling both protection and impedance adjustment functionality.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the substrate are given different qualities: some regions are covered by encapsulating material for protection, while the non-molding area remains exposed for impedance matching. This local differentiation allows each region to serve its specific function optimally.

Inventive Principle:
Principle #3Local quality

2Adaptability or versatility

If non-molding areas are created to enable impedance matching adjustment, then adaptability is improved, but the molding process complexity increases

Engineering Contradiction:
Improveimpedance matching adjustment capabilityVSAvoidmolding process complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The mold cavity is designed with a non-molding area from the beginning, so that when the encapsulating material is applied, it naturally forms the desired pattern with exposed regions. This preliminary design approach avoids complex post-processing steps to create non-molding areas.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

A release agent or sacrificial layer is used as an intermediary during the molding process to prevent encapsulant from adhering in specific areas, thereby creating non-molding regions without requiring complex mold modifications or post-processing.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Adaptability or versatility

If non-molding areas are created by removing encapsulant after molding, then impedance matching flexibility is improved, but manufacturing time and material loss increase

Engineering Contradiction:
Improveimpedance matching flexibilityVSAvoidmanufacturing time
Core Design Contradiction:
Adaptability or versatilityVSLoss of time

Solution Approach 1:

The mold cavity is pre-designed with features that prevent encapsulant from filling certain regions, so that non-molding areas are created during the molding process itself rather than requiring subsequent removal operations. This eliminates additional manufacturing steps and reduces time loss.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

Instead of removing encapsulant material after molding to create non-molding areas, the approach extracts the need for removal by designing the mold to never deposit encapsulant in those regions in the first place, thereby avoiding material waste and additional processing time.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS12119282B2Method of making a semiconductor device package
Publication Date: 2024.10.15 ADVANCED SEMICON ENG INC
  • US12119282B2 patent drawing
  • US12119282B2 patent drawing
  • US12119282B2 patent drawing

AI summary

A semiconductor device package includes a carrier and an encapsulant disposed on the carrier. At least one portion of the encapsulant is spaced from the carrier by a space.