Semiconductor Package Structure With Warpage Control Material

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Solution Overview

Problem

The semiconductor industry faces challenges in achieving efficient packaging of integrated circuit dies due to thermal expansion coefficient (CTE) mismatch, leading to warpage issues during the packaging process, which affects the reliability and performance of device packages.

Innovation Solution

The use of a warpage control material with a specific CTE and Young's Modulus, applied in conjunction with a protection material, to manage CTE mismatch and reduce warpage, along with a method involving conductive pillars, encapsulants, and redistribution structures in the packaging process.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If integrated circuit dies are packaged with conventional materials, then the packaging process is simple, but thermal expansion coefficient mismatch causes warpage issues affecting reliability

Engineering Contradiction:
Improvepackage reliabilityVSAvoidpackaging structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent introduces a buffer layer as an intermediary material between the integrated circuit die and the encapsulant. This buffer layer has a thermal expansion coefficient positioned between that of the die and the encapsulant, acting as a mediator to gradually transition the thermal expansion properties and reduce the abrupt mismatch that causes warpage, thereby improving package reliability without requiring complex packaging structures

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent changes the thermal expansion parameter by selecting materials with specific thermal expansion coefficients for different layers. The buffer layer is specifically chosen to have a thermal expansion coefficient that is greater than that of the integrated circuit die but less than that of the encapsulant, creating a gradient that compensates for differential thermal expansion and prevents warpage during temperature cycling, thus enhancing reliability

Inventive Principle:
Principle #35Parameter changes

2Productivity

If smaller feature sizes are used to increase integration density, then more components can be integrated, but packaging challenges and warpage issues increase

Engineering Contradiction:
Improveintegration densityVSAvoidpackage reliability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent addresses the reliability challenges of high-density integration by changing the material parameters, specifically the thermal expansion coefficients, of the packaging layers. The buffer layer is designed with intermediate thermal expansion properties to compensate for the increased stress and warpage susceptibility that arises when smaller feature sizes and higher integration densities are used, thereby maintaining package reliability despite increased productivity

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively reduces warpage and enhances the reliability of device packages by managing thermal expansion and mechanical stress, improving the integration and performance of integrated circuit dies.

Implementation Method 1

thermal expansion coefficient (CTE) mismatch, leading to warpage issues during the packaging process

Methodology Applied
Scientific EffectThermal expansion: Thermal Expansion

Implementation Method 2

Young's modulus of the warpage control material is greater than a Young's modulus of the encapsulant

Methodology Applied
Scientific EffectElasticity: Elasticity

Data Source

PatentUS11862577B2Package structure and method of fabricating the same
Publication Date: 2024.01.02 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US11862577B2 patent drawing
  • US11862577B2 patent drawing
  • US11862577B2 patent drawing

AI summary

Provided is a package structure, including a die, a plurality of through vias, an encapsulant, a plurality of first connectors, a warpage control material and a protection material. The plurality of through vias are disposed around the die. The encapsulant laterally encapsulate the die and the plurality of through vias. The plurality of first connectors are electrically connected to a first surface of the plurality of through vias. The warpage control material is disposed over a first surface of the die. The protection material is disposed over the encapsulant, around the plurality of first connectors and the warpage control material. A Young's modulus of the warpage control material is greater than a Young's modulus of the encapsulant, and the Young's modulus of the encapsulant is greater than a Young's modulus of the protection material.