Semiconductor Package Redistribution Structure for Warpage Control
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Solution Overview
Problem
The increasing integration density of semiconductor devices leads to warpage issues due to differences in Coefficients of Thermal Expansion (CTEs) of various materials, especially in high-temperature interface and perimeter regions, causing stress and delamination.
Innovation Solution
Incorporation of dummy metal patterns in the redistribution structure, which are electrically isolated and strategically placed to reduce warpage by dissipating heat, providing structural integrity, and uniform metal density, thereby reducing stress and improving bonding yield.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If integration density is increased by reducing minimum feature size, then more components can be integrated into a given area, but warpage and stress issues worsen due to differences in CTEs of various materials
Solution Approach 1:
The patent applies local quality by placing dummy metal patterns specifically in high-stress regions (interface regions between dies and perimeter regions) rather than uniformly across the entire structure. This targeted approach addresses warpage in critical areas without adding unnecessary metal elsewhere, thus managing CTE differences locally where they cause the most problems while maintaining high integration density.
Solution Approach 2:
The patent changes the physical parameters of the redistribution structure by adding dummy metal patterns that modify the overall metal density and thermal mass of the structure. This parameter change helps balance the CTE differences between various materials (substrate, dies, molding compound) and reduces warpage while allowing continued reduction of minimum feature size for higher integration density.
2Stability of the object's composition
If dummy metal patterns are added to reduce warpage, then structural integrity improves, but device complexity increases
Solution Approach 1:
The dummy metal patterns function as sacrificial or non-functional elements that serve their purpose (reducing warpage) without requiring complex interconnections or active functionality. These simple metal regions are easier and cheaper to manufacture than functional interconnect structures, reducing the complexity burden despite adding structural elements.
Solution Approach 2:
By confining dummy metal patterns to specific high-stress regions rather than distributing them uniformly, the patent minimizes the overall complexity increase. The dummy patterns are placed only where needed for structural support and warpage control, leaving other regions simple and maintaining manufacturing efficiency.
3Stability of the object's composition
If dummy metal patterns are placed in interface regions between dies, then warpage is reduced in high-stress areas, but manufacturing precision requirements increase
Solution Approach 1:
The dummy metal patterns are formed as part of the redistribution structure fabrication process, using the same photolithography and metal deposition steps that create the functional interconnects. This preliminary action during standard manufacturing ensures proper placement without requiring additional precision steps, as the dummy patterns are defined by the same design rules and alignment processes as the functional metal layers.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The dummy metal patterns effectively mitigate warpage and improve structural integrity, enhancing bonding yield and reducing cold joints, while also providing electromagnetic interference shielding.
Implementation Method 1
differences in Coefficients of Thermal Expansion (CTEs) of various materials, especially in high-temperature interface and perimeter regions, causing stress and delamination
Implementation Method 2
providing electromagnetic interference shielding
Data Source
AI summary
A semiconductor device includes: a substrate; a plurality of dies attached to a first side of the substrate; a molding material on the first side of the substrate around the plurality of dies; a first redistribution structure on a second side of the substrate opposing the first side, where the first redistribution structure includes dielectric layers and conductive features in the dielectric layers, where the conductive features include conductive lines, vias, and dummy metal patterns isolated from the conductive lines and the vias; and conductive connectors attached to a first surface of the first redistribution structure facing away from the substrate.