Packaged Circuit Signal Sequence Adaptation
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Solution Overview
Problem
In integrated circuit manufacturing, different packaging techniques (such as wire bonding and flip chip bonding) can result in reversed sequences of output signals, requiring changes to the circuit layout on printed circuit boards, which is costly and impractical, especially in high-speed signal applications where layout changes are not feasible.
Innovation Solution
A packaged circuit incorporating a digital controller, port physical layer, and digital coding circuit that adjusts the sequence of output signals by generating and coding clock bits, allowing the circuit to adapt to different packaging techniques without altering the PCB layout or redesigning on-die circuits, ensuring compatibility with other electronic components.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If different packaging techniques (wire bonding or flip chip bonding) are used, then the circuit can be manufactured with different methods, but the output signal sequence becomes reversed requiring PCB layout changes
Solution Approach 1:
The patent implements a dynamic signal sequence adjustment mechanism that can switch between different output signal sequences based on the packaging technique used. The circuit includes a packaging technique detection unit that identifies whether wire bonding or flip chip bonding is used, and automatically adjusts the output signal sequence accordingly. This dynamic adaptation eliminates the need for different PCB layouts while maintaining compatibility with both packaging methods.
Solution Approach 2:
The patent changes the signal sequence parameter dynamically based on the packaging technique. By detecting the packaging method and adjusting the signal output sequence parameter, the system maintains compatibility with fixed PCB layouts. This parameter change approach allows the same hardware design to work with different packaging techniques without requiring physical layout modifications.
2Reliability
If PCB layout is changed to accommodate different packaging techniques, then signal compatibility can be maintained, but manufacturing cost increases significantly
Solution Approach 1:
The patent creates a universal circuit design that can handle multiple packaging techniques through a single PCB layout. The signal sequence adjustment mechanism serves multiple functions: it detects the packaging technique, determines the appropriate signal sequence, and outputs signals in the correct order. This multi-functional approach eliminates the need for multiple PCB variants, significantly reducing manufacturing costs while maintaining signal compatibility.
Solution Approach 2:
The patent introduces a signal sequence adjustment mechanism as an intermediary between the die output and the PCB connector. This intermediary component translates the reversed signal sequence from flip chip bonding into the correct output sequence, or passes through the correct sequence from wire bonding unchanged. This mediator approach maintains signal compatibility without requiring PCB layout changes, reducing manufacturing complexity and cost.
3Reliability
If PCB layout is changed for high-speed signal applications, then signal sequence compatibility can be achieved, but signal quality deteriorates
Solution Approach 1:
The patent performs signal sequence adjustment within the die package before signals reach the PCB. By correcting the signal sequence early in the signal path, within the controlled environment of the package substrate, the system maintains signal integrity. This preliminary action approach avoids the need for PCB layout changes that would expose high-speed signals to additional trace lengths and potential interference, thereby preserving signal quality.
Solution Approach 2:
The patent places a signal sequence adjustment intermediary within the package substrate between the die and the PCB connector. This intermediary corrects the signal sequence in a controlled, short-distance environment, minimizing signal degradation. By handling sequence adjustment within the package rather than through PCB routing changes, the system maintains better signal quality for high-speed applications while achieving the required signal sequence compatibility.
Data Source
AI summary
A packaged circuit including a digital controller, a port physical layer and a digital coding circuit is provided. The digital controller outputs digital data in parallel via a parallel data channel, and the digital data includes a plurality of data bits. The port physical layer includes a clock generator, and outputs a data signal according to the data bits. The clock generator outputs a clock signal to the digital controller. The digital coding circuit is coupled to the digital controller and the port physical layer, and receives the digital data and the clock signal. The digital coding circuit codes the clock signal to generate a plurality of clock bits, and outputs the clock bits to the port physical layer. The port physical layer converts the clock bits into an output clock and outputs the output clock.