Packaged Inductors on IC Substrates for High Q Factor
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Solution Overview
Problem
Conventional wafer-scale fabrication techniques face challenges in achieving high-quality inductors for quartz, MEMs, and LC-based timing applications due to difficulties in forming inductors with low series resistance and smooth metal surfaces, especially when adjacent to lossy materials, which affects the quality factor (Q) of inductors on integrated circuit substrates.
Innovation Solution
A method of forming crystal oscillator circuits involves depositing electrically conductive mounting cement to create electrode adhesion bumps and extensions on crystal resonators, which are then cured to secure and electrically connect the resonators to the substrate, while also incorporating a patterned inductor within a hermetically sealed cavity, using materials like glass or ceramics, to enhance mechanical and electrical stability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional wafer-scale fabrication techniques are used to form inductors on integrated circuit substrates, then manufacturing simplicity is maintained, but inductor quality factor (Q) is reduced due to high series resistance and lossy adjacent materials
Solution Approach 1:
The inductor structure is segmented into multiple layers with conductive plates arranged in alternating patterns across different levels. This segmentation allows the inductor to achieve high Q factor by distributing the magnetic field across multiple isolated segments, reducing losses from adjacent lossy materials while maintaining manufacturability through standard multi-layer fabrication processes
Solution Approach 2:
The inductor design transitions from a planar two-dimensional structure to a three-dimensional multi-layer configuration. Conductive plates are stacked vertically with alternating polarity, creating a vertical magnetic field pattern that exploits the third dimension to reduce coupling with lossy substrate materials while maintaining a compact footprint suitable for wafer-scale fabrication
2Adaptability or versatility
If inductors are formed adjacent to lossy materials on integrated circuit substrates, then integration with circuit functionality is achieved, but inductor Q factor deteriorates due to increased energy losses
Solution Approach 1:
The inductor structure implements local quality optimization by creating regions of high magnetic field confinement between alternating conductive plates, while the outer regions are designed to minimize interaction with lossy substrate materials. This localized field management allows the inductor to maintain high Q factor even when integrated with lossy circuit elements on the same substrate
Solution Approach 2:
The alternating conductive plates act as intermediary shielding layers that mediate between the magnetic field and adjacent lossy materials. These intermediate conductive structures redirect and contain the magnetic flux, preventing it from penetrating into lossy regions while allowing the inductor to remain integrated with the circuit substrate
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the formation of high-quality inductors with improved Q factors by providing a stable and secure attachment of crystal resonators and inductors, reducing losses and enhancing frequency stability, thus addressing the limitations of conventional techniques.
Implementation Method 1
depositing electrically conductive mounting cement onto first and second electrically conductive mounting pads to thereby define first and second electrode adhesion bumps thereon
Implementation Method 2
electrically conductive mounting cement... to secure and electrically connect the resonators to the substrate
Data Source
AI summary
An integrated circuit device includes an integrated circuit substrate having an at least two piece package thereon. The package has a sealed cavity therein and a patterned metal inductor in the cavity. The inductor has at least a first terminal electrically coupled to a portion of the integrated circuit substrate by an electrically conductive via, which extends at least partially through the package. The package, which may include a material selected from a group consisting of glass and ceramics, includes a base and a cap sealed to the base. The metal inductor includes a metal layer patterned on at least one of the cap and base of the package. The base may also include first and second electrically conductive vias therein, which are electrically connected to first and second terminals of the inductor.