Semiconductor Packaging Jig With Elastic Support for Multi-Die Assembly
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Solution Overview
Problem
The integration of multiple semiconductor devices in miniaturized electronic devices poses challenges due to the need for advanced packaging and assembling techniques that enhance electrical performance and reduce transmission and insertion losses.
Innovation Solution
A semiconductor package manufacturing process involving a carrier with a redistribution layer, semiconductor bridges, and testing structures, where semiconductor dies are interconnected through a redistribution structure and encapsulated, allowing for efficient electrical connections and packaging of multiple devices on a reconstructed wafer level.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple semiconductor devices are integrated in miniaturized electronic devices, then device functionality and performance are improved, but manufacturing complexity and difficulty increase
Solution Approach 1:
The manufacturing process is divided into distinct stages: wafer-level processing, die singulation, and package assembly. Each stage handles specific tasks independently, allowing complex multi-device integration to be managed through modular, sequential operations rather than attempting all operations simultaneously on individual devices.
Solution Approach 2:
The patent transitions from traditional two-dimensional planar packaging to three-dimensional stacked packaging architecture. Multiple semiconductor dies are vertically stacked and interconnected through through-silicon vias (TSVs), enabling higher device integration density without increasing the horizontal footprint, thus improving functionality while managing manufacturing complexity through vertical dimension utilization.
2Reliability
If advanced packaging techniques are used to enhance electrical performance, then transmission loss and insertion loss are reduced, but manufacturing difficulty increases
Solution Approach 1:
Redistribution layers and interconnection structures are pre-formed on the semiconductor dies during wafer fabrication before die singulation. This preliminary preparation of electrical interconnection pathways eliminates the need for complex post-assembly wiring operations, reducing manufacturing difficulty while ensuring optimized electrical performance and minimized transmission loss through precisely controlled trace geometries.
Solution Approach 2:
The patent introduces redistribution layers as intermediary structures between the original die pads and the final package external connections. These intermediary conductive layers enable optimized signal routing paths that reduce insertion loss and improve electrical performance, while the standardization of redistribution layer fabrication processes keeps manufacturing difficulty manageable through established semiconductor manufacturing techniques.
3Reliability
If semiconductor dies are interconnected through redistribution structure and encapsulated, then electrical connectivity is improved, but manufacturing process complexity increases
Solution Approach 1:
The patent combines multiple manufacturing operations into integrated process steps: die bonding and underfill application are performed simultaneously, encapsulation and TSV formation are coordinated in sequence, and redistribution layer patterning is integrated with die attachment. This merging of operations reduces the total number of discrete manufacturing steps and simplifies process control while achieving reliable electrical connectivity through the redistribution structure.
Data Source
AI summary
A jig for manufacturing a semiconductor package includes a bottom piece and an upper piece. The bottom piece includes a base, a support plate, and at least one elastic connector. The support plate is located in a central region of the base. The at least one elastic connector is interposed between the support plate and the base. The upper piece includes a cap and outer flanges. The cap overlays the support plate when the upper piece is disposed on the bottom piece. The outer flanges are disposed at edges of the cap, connected with the cap. The outer flanges contact the base of the bottom piece when the upper piece is disposed on the bottom piece. The cap includes an opening which is a through hole. When the upper piece is disposed on the bottom piece, a vertical projection of the opening falls entirely on the support plate.