Packaging Substrate Plasma Etching for Fine Wiring Reliability
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Solution Overview
Problem
Current semiconductor packaging technologies face challenges in achieving high electrical performance due to limitations in reducing wiring pitch and mounting high-performance, high-frequency semiconductor elements, especially with ceramic or resin substrates.
Innovation Solution
A method of manufacturing a packaging substrate involves preparing a base substrate with a core layer and an insulating layer, selectively plasma etching the insulating layer using an organic compound-based etching mask, and forming a patterned insulating layer with through holes for improved electrical connections.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If ceramic substrates are used for packaging, then high resistivity and high dielectric constant are achieved, but it becomes difficult to mount high-performance, high-frequency semiconductor elements
Solution Approach 1:
The patent uses glass substrates instead of traditional ceramic substrates. Glass provides a composite material solution that achieves both high electrical performance and suitability for high-frequency semiconductor mounting, resolving the contradiction between reliability and adaptability.
Solution Approach 2:
The patent changes the material parameter from ceramic to glass, which fundamentally alters the electrical characteristics and mounting properties. This parameter change enables both high resistivity/dielectric constant and compatibility with high-frequency elements simultaneously.
2Adaptability or versatility
If resin substrates are used for packaging, then high-performance, high-frequency semiconductor devices can be mounted, but limitations exist in reducing the pitch of the wiring
Solution Approach 1:
The patent employs glass substrates with specific compositional parameters that enable both high-frequency element mounting and fine wiring pitch reduction. The glass material properties are optimized to overcome the wiring pitch limitations of resin substrates while maintaining adaptability for high-performance devices.
Solution Approach 2:
The patent changes the substrate material parameter from resin to glass, which improves the wiring pitch reduction capability while maintaining the ability to mount high-frequency semiconductor devices. This parameter change resolves the contradiction between adaptability and manufacturing precision.
3Productivity
If plasma etching is performed at high temperature, then etching efficiency is improved, but debris generation and damage to the insulating layer increase
Solution Approach 1:
The patent changes the temperature parameter from high to low (120°C or less) during plasma etching. This parameter change reduces debris generation and damage to the insulating layer while maintaining acceptable etching efficiency through optimized process conditions.
Solution Approach 2:
The patent uses a controlled atmosphere with specific gas compositions (fluorine-based gas and oxygen gas) during plasma etching. This inert environment control reduces harmful debris generation while maintaining etching efficiency, resolving the contradiction between productivity and harmful factors.
4Speed
If plasma etching is performed at high temperature, then etching speed increases, but damage to the base substrate and insulating layer increases
Solution Approach 1:
The patent changes the temperature parameter to 120°C or less during plasma etching. This parameter change reduces substrate and insulating layer damage while maintaining etching speed through optimized process conditions including plasma power (1.5-3 kW) and gas flow rates.
Solution Approach 2:
The patent employs a controlled atmosphere using fluorine-based gas and oxygen gas during plasma etching. This inert environment protects the substrate and insulating layer from damage while maintaining acceptable etching speed, resolving the contradiction between speed and harmful factors.
5Manufacturing precision
If the thickness of the etching mask is increased, then pattern definition accuracy is improved, but removal difficulty and process complexity increase
Solution Approach 1:
The patent optimizes the etching mask thickness parameter to a specific range (5-40 μm). This parameter optimization achieves adequate pattern definition accuracy while facilitating easier removal, resolving the contradiction between manufacturing precision and device complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method enables the formation of packaging substrates with high-density wiring and excellent electrical characteristics, enhancing the electrical performance of semiconductors by improving the bonding strength of the electrically conductive layer and reducing debris and damage during the etching process.
Implementation Method 1
selectively plasma etching the insulating layer with an etching mask to form a patterned insulating layer
Implementation Method 2
a cleaning step of ultrasonically cleaning the base substrate after the patterning step and before the manufacturing step
Data Source
AI summary
A method of manufacturing a packaging substrate according to an embodiment includes a preparation step of preparing a base substrate comprising a core layer and an insulating layer formed on the core layer, a patterning step of selectively plasma etching the insulating layer with an etching mask to form a patterned insulating layer, and a manufacturing step of manufacturing a packaging substrate from the base substrate on which the patterned insulating layer is formed. The etching mask includes an organic compound. The atmosphere temperature of the patterning step is 120° C. or less. In this case, packaging substrates may be manufactured with an improved convenience of manufacturing process and improved electrical reliability.