Packaging Substrate Via Plugging to Prevent RDL Misalignment

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Solution Overview

Problem

Packaging technology in the semiconductor industry does not adequately support the electrical performance of semiconductors, as it often determines the electrical connection and reliability, and the use of ceramic materials in high-end packaging substrates with through holes for improved electrical characteristics is not fully realized due to issues like misalignment and wrinkling of redistribution layers during resin impregnation.

Innovation Solution

A manufacturing method for packaging substrates involving a core layer with through-holes, filled with a via insulating portion formed by screen printing and curing, followed by a descum process to ensure flatness and adhesion, and a redistribution layer to stabilize electrical connections.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If through-holes are formed in ceramic substrate and conductive material is applied to improve electrical characteristics, then electrical performance is improved, but misalignment and wrinkling of redistribution layers occur during resin impregnation

Engineering Contradiction:
Improveelectrical performanceVSAvoidalignment of redistribution layers
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

A via insulating portion is formed in advance within the through-hole before the redistribution layer is applied. This preliminary action prevents resin from penetrating into the through-hole during impregnation, thereby preventing misalignment and wrinkling of the redistribution layer while maintaining the electrical performance benefits of the through-hole structure

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The via insulating portion acts as an intermediary element that fills the through-hole and prevents direct contact between the resin and the through-hole cavity. This intermediary structure eliminates the harmful effect of resin penetration while preserving the electrical connection function

Inventive Principle:
Principle #24Intermediary (Mediator)

2Manufacturing precision

If via insulating portion is formed by screen printing and curing, then flatness and adhesion are improved, but process complexity increases

Engineering Contradiction:
Improveflatness of insulating layerVSAvoidprocess steps
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The via insulating portion formation process serves multiple functions simultaneously: it provides electrical insulation, maintains flatness of the surface for subsequent layer deposition, and ensures adhesion between layers. By combining multiple functions into a single process step, the overall process complexity is reduced despite the additional functionality

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The method enhances electrical reliability and reduces misalignment of redistribution layers, enabling stable signal transmission and improved electrical performance by inhibiting defects and maintaining flatness of the insulating layer.

Implementation Method 1

a filling process of filling the through-hole with a composition for forming the via insulating portion by screen printing

Methodology Applied
Scientific EffectScreen printing:

Implementation Method 2

a curing process of curing the composition for forming the via insulating portion to form the via insulating portion

Methodology Applied
Scientific EffectCuring:

Implementation Method 3

a descum process of plasma-descumming the via-plugged substrate

Methodology Applied
Scientific EffectPlasma descumming: Plasma

Implementation Method 4

The filler may have an average particle diameter of 0.1 μm to less than 15 μm

Methodology Applied
Scientific EffectDispersion: Dispersion (of waves)

Data Source

PatentUS20250218797A1Manufacturing method for packaging substrate
Publication Date: 2025.07.03 ABSOLICS INC
  • US20250218797A1 patent drawing
  • US20250218797A1 patent drawing
  • US20250218797A1 patent drawing

AI summary

A manufacturing method for a packaging substrate is provided. The manufacturing method includes a preparation step of preparing a base substrate including a core layer including an upper surface and a through-hole formed in a thickness direction of the core layer, a via insulating portion forming step of forming a via insulating portion in the through-hole to prepare a via-plugged substrate, and a fabrication step of fabricating a packaging substrate from the via-plugged substrate.