Packed Integer Accelerator for Lattice-Based Cryptography
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current cryptographic systems, particularly those based on asymmetric cryptosystems like RSA and ECC, are vulnerable to quantum computer attacks and require transition to more robust lattice-based cryptosystems like Kyber, Dilithium, and Saber, which face inefficiencies in modular arithmetic operations, especially with small moduli, leading to slow polynomial multiplication.
Innovation Solution
The implementation of a computer system that uses an n×n-bit multiplier configured as a coprocessor or accelerator to perform Number-Theoretic Transform (NTT) operations in a SIMD manner by packing operands into a packed integer, facilitating modular multiplication through Barrett or Montgomery algorithms, and separating high-order and low-order parts for efficient processing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If lattice-based cryptosystems are implemented for quantum resistance, then security against quantum attacks is improved, but processing speed deteriorates due to inefficient modular arithmetic operations
Solution Approach 1:
The patent segments the modular multiplication operation into high-order and low-order parts, processing them separately through distinct computational paths. This segmentation allows parallel processing of different operand portions, improving overall processing speed while maintaining the security requirements of lattice-based cryptosystems
Solution Approach 2:
The patent transforms the problem from scalar modular arithmetic to vector-based SIMD operations by packing multiple operands into a single integer. This dimensional transformation enables parallel processing of multiple cryptographic operations simultaneously, addressing the speed deterioration issue while maintaining quantum resistance
2Reliability
If polynomial multiplication is performed for lattice-based cryptography, then cryptographic security is improved, but computational efficiency worsens due to slow modular arithmetic operations
Solution Approach 1:
The patent merges multiple scalar operations into a single vector operation by packing multiple operands into a packed integer. This combining of operations allows the cryptographic system to perform multiple polynomial multiplications in parallel, improving computational efficiency without compromising the security properties of lattice-based cryptography
Solution Approach 2:
The patent changes the parameter representation from individual small-modulus operands to a packed integer format containing multiple operands. This parameter transformation enables the use of optimized multiplication algorithms that operate on the packed format, significantly improving computational efficiency while maintaining the required cryptographic security
Data Source
AI summary
Cryptographic-related processing is facilitated by obtaining multiple input operands, and packing the multiple input operands together to form a packed integer. The packed integer is an n-bit integer including multiple slots, where input operands of the multiple input operands are packed into every other slot of the multiple slots, and each slot of the multiple slots has a bitwidth k. Further, the process includes providing the packed integer as input to an n-bit accelerator to facilitate performing one or more predefined operations using the packed integer, to transform the packed integer into result data which facilitates cryptographic-related processing.