Selective Packet Acceleration in Network Processors
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Solution Overview
Problem
Complex networking architectures in mobile wireless environments face challenges in optimizing packet processing due to increased data traffic and the need for efficient resource management, particularly in deep packet inspection operations, which can lead to performance degradation and increased costs.
Innovation Solution
Implementing a system that utilizes a network processor to selectively accelerate data flows by bypassing the general processor for certain frames, based on predefined conditions, allowing for efficient processing and resource optimization while maintaining deep packet inspection capabilities.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If deep packet inspection operations are performed by the general processor for all data flows, then processing accuracy and security monitoring are improved, but network processing speed and resource efficiency deteriorate
Solution Approach 1:
The patent segments data flows into two categories: flows requiring deep packet inspection by the general processor and flows that can be handled by the network processor alone. This segmentation allows the system to apply intensive processing only where necessary while maintaining high-speed processing for routine traffic, thus resolving the contradiction between inspection accuracy and processing speed.
Solution Approach 2:
The patent implements local quality by applying different processing qualities to different portions of traffic. High-quality deep packet inspection is applied selectively to specific data flows based on criteria such as protocol type, source/destination, or security requirements, while other flows receive standard processing. This ensures inspection accuracy is maintained where needed without compromising overall network processing speed.
2Adaptability or versatility
If the general processor handles all packet processing operations, then processing flexibility and inspection depth are improved, but resource utilization and cost efficiency deteriorate
Solution Approach 1:
The patent extracts routine packet processing functions from the general processor and assigns them to the network processor. This extraction allows the general processor to focus on complex inspection tasks requiring flexibility and adaptability, while the network processor handles volume-intensive routine operations. The result is improved resource utilization and cost efficiency while maintaining processing flexibility where needed.
Solution Approach 2:
The patent implements multi-functionality by designing a system where the network processor handles standard packet forwarding and filtering operations, while the general processor provides adaptive deep inspection capabilities. This universal architecture allows the system to efficiently handle both routine high-volume traffic and complex inspection requirements, optimizing resource consumption across different processing scenarios.
3Productivity
If selective flow acceleration is implemented, then network processor utilization and speed are improved, but system complexity and coordination overhead increase
Solution Approach 1:
The patent applies preliminary action by pre-classifying data flows into categories that determine their processing path. Flow classification and acceleration decisions are made in advance based on predefined criteria, eliminating the need for complex real-time coordination during packet processing. This preliminary classification simplifies the system while maintaining high network processor utilization and throughput.
Data Source
AI summary
A data flow is received at a network processor that includes a plurality of frames. A first set of frames in the plurality of frames are passed from the network processor to a general processor for processing by the general processor. A flow acceleration request is received at the network processor from the general processor based at least in part on inspection of a first frame in the first set of frames. The flow acceleration request is received subsequent to passing at least two of the first set of frames to the general processor. A particular frame in the plurality of frames received subsequent to the first set of frames is processed by the network processor such that it is accelerated relative to processing of the first set of frames by the general processor and bypasses the general processor.