Packet Buffer Memory Layout Using Control-Memory Integrity Data
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Solution Overview
Problem
Communication and computing networks face increased congestion due to packet buffer memory overflow, leading to dropped packets and reduced throughput, as existing solutions require additional memory resources to enhance buffering capacity.
Innovation Solution
The method involves storing data integrity information in control memory instead of data memory, allowing for increased packet buffering capacity without the need for additional memory devices, by reconfiguring packet control information to include data protection information within control blocks and using reserved bits or error correction bits for this purpose.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If data integrity information is stored in data memory, then data protection is ensured, but packet buffering capacity is reduced
Solution Approach 1:
The patent extracts data integrity information from data memory and relocates it to control memory. This separation allows data memory to be dedicated entirely to packet data storage, maximizing buffering capacity, while control memory stores the integrity information needed for error detection and correction without competing for the same storage resources.
2Quantity of substance
If additional memory devices are added to increase buffering capacity, then packet buffering capacity increases, but cost and device complexity increase
Solution Approach 1:
The patent makes control memory serve a dual function: storing control information for packet data and storing data integrity information. This multi-functionality eliminates the need for separate dedicated storage for integrity checks, allowing existing memory resources to be utilized more efficiently for packet buffering without adding new memory devices.
Solution Approach 2:
The patent combines the storage of control information and data integrity information in the same control memory location. This merging of functions allows the system to maximize the use of available memory resources for packet buffering while maintaining data protection capabilities, avoiding the need for additional memory devices.
3Quantity of substance
If packet buffer memory is filled to capacity, then memory utilization is maximized, but packet loss increases due to dropped packets
Solution Approach 1:
The patent performs preliminary error detection using integrity information stored in control memory before packets are transmitted or processed further. This allows the system to identify and handle erroneous packets early, preventing the propagation of corrupted data and maintaining reliable packet delivery even when buffer memory is fully utilized.
Data Source
AI summary
A method performed by an I/O unit connected to another I/O unit in a network device. The method includes receiving a packet; segmenting the packet into a group of data blocks; storing the group of data blocks in a data memory; generating data protection information for a data block of the group of data blocks; creating a control block for the data block; storing, in a control memory, a group of data items for the control block, the group of data items including information associated with a location, of the data block, within the data memory and the data protection information for the data block; performing a data integrity check on the data block, using the data protection information, to determine whether the data block contains a data error; and outputting the data block when the data integrity check indicates that the data block does not contain a data error.