Packet Buffering Memory Segmentation for Network Devices
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Solution Overview
Problem
Network devices face a trade-off in buffering requirements, with internal memory being expensive and non-scalable but low in power consumption, while external memory is inexpensive and scalable but high in power utilization and low in performance, making it difficult to achieve high performance, low power consumption, and high buffering scalability.
Innovation Solution
A mechanism that maximizes internal memory utilization by transferring queued packets to external memory when internal memory reaches a threshold, allowing for efficient use of both internal and external memory for packet queuing, thereby achieving high performance, scalability, and low power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If external memory is used for packet buffering, then buffering scalability and cost are improved, but power consumption increases and performance decreases
Solution Approach 1:
The patent divides the buffering system into two segments: internal memory for high-priority packets and external memory for low-priority packets. This segmentation allows the system to utilize the low power consumption of internal memory for critical traffic while offloading non-critical traffic to external memory, thereby achieving overall power efficiency without sacrificing necessary buffering capacity.
Solution Approach 2:
The patent applies local quality by assigning different memory types to different priority levels of packet traffic. High-priority packets are buffered in internal memory with superior performance and low power characteristics, while low-priority packets are buffered in external memory. This localized optimization ensures that power consumption is minimized for critical operations while maintaining scalability for overall buffering.
2Quantity of substance
If external memory is used for packet buffering, then buffering scalability and cost are improved, but performance decreases
Solution Approach 1:
The patent segments the packet buffering system into internal memory for high-priority packets requiring fast access and external memory for low-priority packets. This segmentation ensures that time-sensitive, high-speed packet processing is performed in internal memory while external memory provides scalable capacity for less time-critical traffic, thereby maintaining overall system performance while achieving buffering scalability.
Solution Approach 2:
The patent implements local quality by providing different memory access characteristics to different packet priorities. High-priority packets access internal memory with fast response times, while low-priority packets access external memory with acceptable but slower response times. This localized performance optimization ensures that critical performance requirements are met without requiring the entire system to operate at high speed.
3Speed
If internal memory is used for packet buffering, then performance and power consumption are improved, but cost increases and buffering scalability decreases
Solution Approach 1:
The patent segments the buffering workload between internal and external memory based on packet priority and access patterns. Internal memory handles time-sensitive, high-speed packet buffering requirements, while external memory provides additional scalable capacity for less time-critical packets. This segmentation allows the system to achieve both high performance for critical traffic and scalable buffering capacity for overall traffic management.
Solution Approach 2:
The patent applies local quality by assigning internal memory with superior performance characteristics to high-priority packet buffering needs, while using external memory for lower-priority buffering requirements. This localized allocation of memory resources ensures that each packet priority level receives the appropriate memory characteristics, achieving both performance optimization and cost-effective scalability.
4Use of energy by moving object
If internal memory is used for packet buffering, then power consumption is reduced, but buffering scalability and cost-effectiveness worsen
Solution Approach 1:
The patent segments the packet buffering system into internal memory for low-power, high-priority packet handling and external memory for scalable, cost-effective buffering of lower-priority packets. This segmentation enables the system to minimize power consumption for critical traffic while achieving scalable buffering capacity through external memory, thereby resolving the contradiction between power efficiency and buffering scalability.
Solution Approach 2:
The patent implements local quality by providing different power consumption characteristics to different packet priorities. High-priority packets are buffered in internal memory with low power consumption, while low-priority packets are buffered in external memory. This localized power optimization ensures that the system achieves overall power efficiency while maintaining scalable buffering capacity for diverse traffic requirements.
Data Source
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AI summary
A mechanism is provided to maximize utilization of internal memory for packet queuing in network devices, while providing an effective use of both internal and external memory to achieve high performance, high buffering scalability, and minimizing power utilization. Embodiments initially store packet data received by the network device in queues supported by an internal memory. If internal memory utilization crosses a predetermined threshold, a background task performs memory reclamation by determining those queued packets that should be targeted for transfer to an external memory. Those selected queued packets are transferred to external memory and the internal memory is freed. Once the internal memory consumption drops below a threshold, the reclamation task stops.