Packet Classification Hardware Accelerator Parallel Decision Trees
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Solution Overview
Problem
Current packet classification techniques face challenges in scalability, cost, and throughput, with TCAMs consuming high power and having limited size, while algorithmic approaches require large memory and have low throughput.
Innovation Solution
A packet classification hardware accelerator system with multiple units capable of parallel operation on decision trees, utilizing a memory and cache subsystem to store non-leaf nodes, leaf nodes, and rules, and a cache system to optimize node retrieval and rule identification.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If TCAM is used for packet classification, then matching flexibility is improved, but power consumption increases and device size is limited
Solution Approach 1:
The patent divides the packet classification task into multiple segments by creating multiple decision trees from different subsets of the rule set. Each hardware unit processes one decision tree, allowing parallel processing while reducing the memory and power requirements of individual units compared to a single large TCAM system.
Solution Approach 2:
The patent replaces the TCAM mechanical system with a software-based decision tree approach executed on general-purpose hardware. This substitution eliminates the need for specialized TCAM hardware, significantly reducing power consumption and device cost while maintaining classification functionality through software algorithms.
2Adaptability or versatility
If TCAM is used for packet classification, then matching flexibility is improved, but device cost increases
Solution Approach 1:
The patent replaces expensive TCAM hardware with software-based decision tree processing on standard hardware platforms. This substitution dramatically reduces device cost while maintaining the ability to perform flexible packet classification through software algorithms that can be deployed on commodity processors.
Solution Approach 2:
The patent creates a universal packet classification system using general-purpose hardware that can handle multiple classification rules and scenarios. The software-based decision trees provide multi-functionality, allowing the same hardware platform to perform various packet classification tasks without requiring specialized TCAM configurations for each application.
3Adaptability or versatility
If algorithmic approach is used for packet classification, then implementation flexibility is improved, but throughput decreases
Solution Approach 1:
The patent segments the rule set into multiple subsets, each processed by a separate hardware unit executing decision trees. This segmentation enables parallel processing of multiple packet streams simultaneously, dramatically increasing throughput while maintaining the implementation flexibility of software-based algorithms.
Solution Approach 2:
The patent performs preliminary actions by pre-processing the rule set to generate multiple decision trees before packet classification begins. This pre-computation allows the hardware units to efficiently process packets in real-time without complex runtime rule compilation, thereby increasing throughput while preserving algorithmic flexibility.
4Adaptability or versatility
If algorithmic approach is used for packet classification, then implementation flexibility is improved, but memory footprint increases
Solution Approach 1:
The patent segments the rule set into multiple smaller subsets that are processed by different hardware units. Each unit maintains only the memory required for its specific decision tree, significantly reducing the total memory footprint compared to a single algorithmic approach that must hold the entire rule set in memory.
Data Source
AI summary
Systems and methods for packet classification hardware acceleration are provided. According to one embodiment, a packet classification hardware accelerator system includes multiple packet classification hardware units, a memory and a cache subsystem. The packet classification hardware units are each capable of operation in parallel on a corresponding decision tree of multiple decision trees that have been derived from respective subsets of a common ruleset defining packet classification rules based on header fields of packets. The memory has stored therein non-leaf nodes, leaf nodes and rules associated with the decision trees. The cache subsystem is coupled in communication with packet classification hardware units and the memory and has stored therein (i) a cached portion of the non-leaf nodes distributed among multiple non-leaf node caches, (ii) a cached set of the leaf nodes in a leaf node cache and (iii) a cached set of the rules.